Array Substrate Cross-Line Layout for Flexible Display Reliability
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Solution Overview
Problem
In flexible display panels, signal lines in different layers prone to short circuits and fractures at cross line positions due to increased current densities and stress when bent, leading to signal loss and poor display effects.
Innovation Solution
Segmenting first signal lines into alternately connected first and second sub segments with varying widths, and arranging cross line regions to evenly distribute current densities and disperse stress, reducing the risk of short circuits and fractures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If line width thinning processing is performed on the first signal line at the cross line position, then the capacitance load is reduced and signal delay is minimized, but the current density increases and the signal line becomes prone to fracture when bent
Solution Approach 1:
The first signal line is segmented into multiple sections along its extending direction: a first section with a first line width, a second section with a second line width smaller than the first, and a third section with a third line width larger than the second. This segmentation allows different portions of the signal line to have different widths, optimizing both electrical performance and mechanical strength at different locations.
Solution Approach 2:
Different sections of the first signal line are assigned different line widths according to their specific functional requirements. The second section has a reduced width to minimize capacitance at the cross line position, while the first and third sections maintain larger widths to ensure adequate current carrying capacity and mechanical strength. This local optimization resolves the contradiction between reducing signal delay and maintaining line strength.
2Loss of energy
If the first signal line is made thinner at the cross line position, then the capacitance formed at overlapping positions is reduced, but the current density increases and short circuit becomes prone when insulation layer cracks occur
Solution Approach 1:
The first signal line is divided into sections with different widths, creating a structured approach to managing capacitance and current density. The second section with reduced width specifically addresses capacitance reduction at the cross line position, while the adjacent first and third sections with larger widths provide redundancy and lower current density, improving reliability against short circuits.
Solution Approach 2:
The line width parameter of the first signal line is changed along its extending direction, transitioning from a first line width to a second line width and then to a third line width. This parameter variation allows optimization of capacitance characteristics at the cross line position while maintaining adequate current carrying capacity and reliability in other sections.
3Ease of manufacture
If uniform line width is maintained throughout the first signal line, then manufacturing is simplified, but signal delay increases due to higher capacitance at cross line positions
Solution Approach 1:
Instead of maintaining a uniform line width, the first signal line is segmented into sections with different widths. This segmentation enables the second section to have a reduced width specifically at the cross line position, thereby reducing capacitance and signal delay, while the first and third sections maintain larger widths for adequate signal transmission capability.
Solution Approach 2:
The line width is locally optimized at the cross line position by reducing it in the second section, while other sections maintain larger widths. This local quality variation addresses the signal delay issue at critical locations without requiring uniform thinning throughout the entire signal line, thus achieving performance improvement with manageable manufacturing complexity.
Data Source
AI summary
An array substrate, a display panel, and a display device are provided. The array substrate includes a display region and a peripheral region. The peripheral region includes a substrate, and a plurality of first signal lines arranged in a first direction, an insulation layer, and a plurality of second signal lines arranged in the second direction. Each first signal line includes a first sub segment and a second sub segment which are alternately connected in the second direction. An orthographic projection of the second signal line on the substrate respectively overlaps with an orthographic projection of the first sub segment on the substrate and an orthographic projection of the second sub segment on the substrate to form a first cross line region and a second cross line region, respectively. The first cross line region and the second cross line region are arranged alternately along the first direction.