Array Substrate Protection Layer for Data Line Crack Prevention
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing array substrates for flat panel displays suffer from data line cracking during etching due to bubble-shaped gaps between the barrier layer and the metal forming the data line, especially at slope positions where height changes occur.
Innovation Solution
A protection layer made of ZnO, InZnO, ZnSnO, GaInZnO, or ZrInZnO is introduced between the gate insulating layer and the data line, directly contacting the data line and providing a gap-free interface, which enhances corrosion resistance and prevents cracking during etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If SiOx or SiOx/SiNx is used for gate insulating layer and barrier layer, then the manufacturing process is simplified, but the contact face has poor compactness with bubble-shaped gaps, leading to data line cracking
Solution Approach 1:
The patent introduces an intermediate layer as a mediator between the barrier layer and metal data line to eliminate bubble-shaped gaps. This intermediate layer improves contact face compactness without complicating the overall manufacturing process, as it can be integrated into existing fabrication steps.
Solution Approach 2:
The patent employs composite material structures by combining the barrier layer (SiOx or SiOx/SiNx) with an intermediate layer of different material composition. This composite structure achieves both good adhesion and compact contact face, preventing gap formation while maintaining compatibility with standard manufacturing processes.
Data Source
AI summary
An array substrate, a display device and a method of producing the array substrate are provided, and the array substrate includes a substrate and a thin film field effect transistor and a data line formed on the substrate, and the thin film field effect transistor includes a gate electrode, an active layer, a source electrode and a drain electrode, a gate insulating layer is formed between the gate electrode and the active layer, and the array substrate includes: a protection layer formed between the gate insulating layer and the data line and being in direct contact with the data line; and the protection layer is provided on the same layer with and has the same material with the active layer.