Array Substrate Data Line Layering for OLED Brightness Uniformity
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Solution Overview
Problem
In OLED display technology, the existing array substrates face challenges in achieving uniform brightness and efficient data signal transmission due to differences in impedance and parasitic capacitance between adjacent data lines, which affect display quality and uniformity.
Innovation Solution
The array substrate design includes adjacent data lines in the same layer extending from the inter-column region into the boundary area, with signal lines and voltage supply lines configured to reduce parasitic capacitance and impedance differences, using a unique layer structure and switching structures to connect signal and data supply lines across layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If adjacent data lines are placed in different layers, then signal transmission can be achieved, but impedance differences and parasitic capacitance increase affecting brightness uniformity
Solution Approach 1:
The patent transitions from vertical layer separation to horizontal planar arrangement by placing adjacent data lines in the same layer. This dimensional change eliminates the need for vias and inter-layer connections, reducing parasitic capacitance and impedance variations while maintaining signal transmission functionality.
Solution Approach 2:
The patent merges the routing of adjacent data lines into the same conductive layer, combining what were previously separate layer structures into a unified planar configuration. This merging reduces the number of interfaces and connection points, thereby reducing parasitic capacitance and improving brightness uniformity.
2Adaptability or versatility
If data lines extend into boundary area, then routing flexibility improves, but parasitic capacitance and impedance differences increase
Solution Approach 1:
The patent applies different structural characteristics to different regions: in the display area, data lines follow regular patterns, while in the boundary area, they extend flexibly into the peripheral area. This local adaptation allows routing flexibility in the boundary region without compromising signal quality in the display area, as the extended portions are isolated from active pixel regions.
3Illumination intensity
If adjacent data lines are in the same layer, then parasitic capacitance and impedance differences are reduced, but manufacturing complexity increases
Solution Approach 1:
The patent modifies the structural parameters of data lines in the boundary area, specifically extending them into the peripheral area and adjusting their routing paths. These parameter changes allow the same-layer configuration to be implemented without requiring fundamentally new manufacturing processes, as they build upon existing thin-film transistor fabrication capabilities.
Data Source
AI summary
An array substrate is provided. The array substrate includes a first adjacent data line and a second adjacent data line extending along a first direction. The first adjacent data line and the second adjacent data line extend from a same inter-column region between a first column of pixel driving circuit and a second column of pixel driving circuit in a display area into a boundary area between the first column of pixel driving circuit and a peripheral area. In the boundary area, the first adjacent data line and the second adjacent data line are in a same layer.