Array Substrate Data Line Reduction for Display Uniformity

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional display technologies require a large number of data lines and data driving chips, leading to increased manufacturing costs and energy consumption, while also facing challenges in uniform data signal transmission and image brightness.

Innovation Solution

The array substrate design reduces the number of data lines by arranging sub-pixels in a matrix of m×2n, with each row connected to two gate lines and each column connected to a single data line, simplifying fabrication and reducing energy consumption by alternating data line polarity reversal frequency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional display technologies use a large number of data lines and data driving chips, then data signal transmission can be achieved, but manufacturing costs and energy consumption increase

Engineering Contradiction:
Improvedata signal transmissionVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent merges the data line functions by allowing 2n sub-pixels to share a single data line through alternating polarity reversal, reducing the number of data lines from 2n to n, thereby reducing energy consumption and manufacturing complexity while maintaining reliable data signal transmission

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements periodic polarity reversal of data signals at different frequencies for different sub-pixel groups (2n sub-pixels use frequency f, n sub-pixels use frequency 2f), enabling time-division multiplexing that reduces the number of required data lines and driving chips while maintaining signal transmission reliability

Inventive Principle:
Principle #19Periodic action

2Reliability

If conventional display technologies use a large number of data lines and data driving chips, then data signal transmission can be achieved, but manufacturing costs increase

Engineering Contradiction:
Improvedata signal transmissionVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent merges multiple data line functions into fewer lines by implementing time-division multiplexing with alternating polarity reversal, reducing the number of data driving chips from 2n to n, which directly reduces manufacturing cost while maintaining data signal transmission capability

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

By using periodic polarity reversal at different frequencies for different sub-pixel groups, the patent enables a single data line to serve multiple sub-pixels sequentially, reducing the number of data driving chips required and thereby reducing manufacturing cost

Inventive Principle:
Principle #19Periodic action

3Reliability

If data lines are arranged in conventional configurations, then sub-pixels can be connected, but data signal transmission uniformity and image brightness are compromised

Engineering Contradiction:
Improvedata signal transmissionVSAvoidimage brightness uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent implements periodic polarity reversal at different frequencies for different sub-pixel groups (2n sub-pixels use frequency f, n sub-pixels use frequency 2f), which equalizes the data signal transmission paths and improves image brightness uniformity by compensating for path differences through temporal multiplexing

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent changes the frequency parameter of data signal transmission differently for different sub-pixel groups, using frequency f for 2n sub-pixels and frequency 2f for n sub-pixels, which equalizes transmission characteristics and improves image brightness uniformity

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP3712692B1Array substrate, display panel and display device
Publication Date: 2023.10.04 BOE TECHNOLOGY GROUP CO LTD
  • EP3712692B1 patent drawingFigure 1
  • EP3712692B1 patent drawingFigure 2
  • EP3712692B1 patent drawingFigure 3

AI summary

An array substrate includes a base substrate; a plurality of gate lines extending in a row direction on the base substrate; a plurality of data lines extending in a column direction intersecting the row direction on the base substrate; and a plurality of pixel groups in rows and columns, each including two sub-pixels side by side in the row direction. Each of the rows of pixel groups is connected to two respective ones of the gate lines, and the two sub-pixels of each pixel group in the row of pixel groups are respectively connected to different ones of the two respective gate lines. The data lines and the columns of pixel groups are alternately arranged in the row direction, and the two sub-pixels of each of the plurality of pixel groups are connected to a corresponding one of the plurality of data lines directly adjacent to the pixel group.