Array Substrate Data Line Reduction Tri-Gate Display

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Solution Overview

Problem

Existing Liquid Crystal Display (LCD) panels require more data lines and source driver chips, leading to higher costs and issues like horizontal text jaggedness and color mixing due to the Tri-gate architecture.

Innovation Solution

An array substrate design with sub-pixels arranged along a direction, reducing the number of data lines and introducing a diversified driving sequence to balance light load and heavy load pixels, using a color resist layer with differently colored blocks to improve text clarity and eliminate color cast.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If each pixel corresponds to three data lines in the Tri-gate architecture, then the display structure can be formed, but the number of data lines and source driver chips increases, resulting in higher cost

Engineering Contradiction:
Improvedisplay structure formationVSAvoidnumber of data lines and source driver chips
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent merges the data line connections by having multiple sub-pixels share the same data line. Specifically, sub-pixels in the same column are connected to the same data line, reducing the total number of data lines required from three per pixel to one per column, thereby reducing device complexity and cost while maintaining the Tri-gate display structure

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent segments the scan line function into multiple sub-scan lines (first, second, and third sub-scan lines) within each scan line group. This segmentation allows different sub-pixels to be controlled by different sub-scan lines while sharing data lines, enabling the reduction in data line count while preserving the necessary pixel control functionality

Inventive Principle:
Principle #1Segmentation

2Device complexity

If sub-pixels are arranged horizontally along the first direction, then the number of data lines can be reduced, but horizontal text jaggedness occurs

Engineering Contradiction:
Improvenumber of data linesVSAvoidtext clarity
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent implements a diversified driving sequence that periodically switches between different scanning patterns. The driving sequence includes first, second, and third sequences that alternate between scanning even and odd pixel rows, and between different sub-pixel groups. This periodic action balances the light and heavy load pixels over time, eliminating horizontal text jaggedness while maintaining the reduced data line configuration

Inventive Principle:
Principle #19Periodic action

3Device complexity

If the Tri-gate architecture is used to reduce data lines, then cost decreases, but color mixing and color cast occur

Engineering Contradiction:
Improvenumber of data linesVSAvoidcolor accuracy
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The diversified driving sequence periodically activates different sub-pixel groups in different rows, ensuring that light load and heavy load pixels are balanced over time. This periodic switching prevents color mixing and color cast by evenly distributing the activation patterns across all sub-pixels, maintaining color accuracy while using the reduced data line Tri-gate architecture

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent applies different driving sequences to different pixel rows based on their local characteristics. Even pixel rows and odd pixel rows are scanned differently, with specific sub-pixel groups activated in specific sequences. This local quality approach ensures that each region's color output is optimized, preventing overall color mixing and cast in the display

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12253764B1Array substrates and display panels
Publication Date: 2025.03.18 GUANGZHOU CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
  • US12253764B1 patent drawing
  • US12253764B1 patent drawing
  • US12253764B1 patent drawing

AI summary

An array substrate and a display panel including a plurality of pixels, a plurality of scan line groups and a plurality of data lines, each of the pixels includes at least three sub-pixels, each of the scan line group includes three sub-scan lines, one of the scan line groups is provided between adjacent two of the pixel rows, and at least two of the sub-pixels in each of the pixels are connected to different two of the sub-scan lines in the one of the scan line groups, one of the pixel columns is provided between adjacent two of the data lines, and at least two of the sub-pixels in each of the pixels are connected to a same one of the data lines.