Array Substrate Drain Contact Hole Merging for Aperture Ratio
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Solution Overview
Problem
Fringe field switching mode liquid crystal display devices face limitations in aperture ratio, which affects their ability to achieve high resolution due to the area requirements of the drain contact hole and the disposition of elements on the array substrate.
Innovation Solution
The array substrate design includes a single drain contact hole that exposes both drain electrodes of adjacent thin film transistors, minimizing the area of the drain contact hole and optimizing the placement of semiconductor and source electrodes at the boundary of pixel regions, thereby improving the aperture ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a drain contact hole is formed for each pixel region to expose the drain electrode, then the thin film transistor can be properly connected, but the aperture ratio is reduced due to the area occupied by multiple drain contact holes
Solution Approach 1:
The patent merges the drain contact holes of two adjacent pixel regions into a single shared contact hole. The planarization layer has one drain contact hole that exposes both drain electrodes from adjacent pixel regions, eliminating the need for separate contact holes for each pixel. This merging reduces the total area occupied by contact holes while maintaining proper electrical connections for both pixels.
2Reliability
If the semiconductor layer and source electrode are disposed within the pixel region, then the thin film transistor function is achieved, but the aperture ratio is reduced due to element disposition area
Solution Approach 1:
The patent applies local quality by positioning the semiconductor layer and source electrode at the boundary between pixel regions rather than within the central area of each pixel region. This boundary placement utilizes the interface area between pixels, allowing the transistor components to be disposed in a location that does not consume the active display area of either pixel, thereby improving the aperture ratio while maintaining transistor functionality.
Data Source
AI summary
An array substrate for a liquid crystal display device, comprises: a substrate having a display region and a non-display region; a gate line and first and second data lines on the substrate; first and second thin film transistors in the first and second pixel regions, respectively, the first thin film transistor connected to the gate line and the first data line, the second thin film transistor connected to the gate line and the second data line; a planarization layer on the first and second thin film transistors, the planarization layer having a drain contact hole exposing both of drain electrodes of the first and second thin film transistors; and a pixel electrode and a common electrode over the planarization layer.