Array Substrate Dual Metal Oxide Semiconductor Layers
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Solution Overview
Problem
The performance of TFT-LCDs is hindered by the low mobility of amorphous silicon active layers, which results in inadequate electrical conductivity and unsuitable for large-size displays, and metal oxide semiconductors with higher mobility often suffer from increased leakage currents.
Innovation Solution
An array substrate with at least two metal oxide semiconductor layers, where the first layer (ITZO) has a higher mobility (>30 cm2/V*s) and the second layer (IGZO) has lower mobility (>8-10 cm2/V*s), with the first layer acting as a carrier-transporting layer and the second as a higher resistance layer, reducing leakage current and stabilizing performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If amorphous silicon is used for the active layer, then the manufacturing process is simple and cost-effective, but the mobility is low (about 1 cm2/(V*s)) and electrical conductivity is insufficient
Solution Approach 1:
The patent employs a composite structure consisting of two distinct metal oxide semiconductor layers: a first layer with high mobility characteristics and a second layer with low leakage current characteristics. This composite configuration combines the advantages of both materials to achieve high mobility while maintaining low leakage current, thereby resolving the contradiction between electrical conductivity and manufacturing simplicity.
Solution Approach 2:
The patent utilizes parameter changes by selecting metal oxide semiconductors with different mobility values for the two layers. The first layer has mobility greater than 30 cm2/V*s while the second layer has mobility greater than 8-10 cm2/V*s. By controlling these mobility parameters and thickness parameters (both 10-50 nm), the patent achieves optimal electrical conductivity without compromising manufacturing feasibility.
2Reliability
If metal oxide semiconductor with higher mobility is used, then the mobility increases (greater than 30 cm2/V*s), but the leakage current increases significantly
Solution Approach 1:
The patent divides the active layer into two separate metal oxide semiconductor layers with distinct functional characteristics. The first layer (thickness: 10-50 nm) is designed with high mobility (>30 cm2/V*s) to facilitate carrier transport, while the second layer (thickness: 10-50 nm) is designed with lower mobility (>8-10 cm2/V*s) to suppress leakage current. This segmentation allows each layer to optimize its specific function without compromising the other.
Solution Approach 2:
The patent applies local quality by assigning different material properties to different regions (layers) of the active layer. The first metal oxide semiconductor layer possesses high mobility characteristics localized for efficient carrier transport, while the second layer possesses low leakage current characteristics localized for current suppression. This spatial differentiation of material properties resolves the contradiction between mobility and leakage current.
3Device complexity
If a single metal oxide semiconductor layer is used, then the structure is simple, but it cannot simultaneously achieve high mobility and low leakage current
Solution Approach 1:
The patent implements a composite active layer structure with two metal oxide semiconductor layers, each contributing different performance characteristics. The first layer provides high mobility (>30 cm2/V*s) while the second layer provides low leakage current (>8-10 cm2/V*s mobility). This composite structure achieves superior TFT performance that cannot be obtained with a single material, balancing structural complexity with performance requirements.
Solution Approach 2:
The patent transitions from a single-layer structure to a multi-layer structure, adding the dimensional aspect of layering to the active layer design. By stacking two metal oxide semiconductor layers with different thicknesses (10-50 nm each) and different electrical characteristics, the patent creates a vertical dimension of functionality that enables simultaneous optimization of mobility and leakage current suppression.
Data Source
AI summary
The present invention provides an array substrate. The active layer of the array substrate comprises at least two metal oxide semiconductor layers, wherein the at least two metal oxide semiconductor layers includes a first metal oxide semiconductor layer and a second metal oxide semiconductor layer, the first metal oxide semiconductor layer is formed on a gate insulating layer, an etching barrier layer is formed on the second metal oxide semiconductor layer, and the mobility of the first metal oxide semiconductor layer is greater than the mobility of the second metal oxide semiconductor layer.