Array Substrate With Dual Reset Lines for Faster Pixel Response

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Solution Overview

Problem

Existing OLED display panels face challenges in optimizing the power consumption, response speed, accuracy, and display effect due to the simultaneous requirements of thorough pixel circuit reset and minimal light-emitting device charging time.

Innovation Solution

The array substrate incorporates two separate reset voltage lines: a driving reset voltage line and a light-emitting reset voltage line, allowing for independent setting of reset voltages to optimize pixel circuit reset and minimize light-emitting device charging time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single reset voltage line is used to reset both the pixel circuit and light-emitting device, then the device complexity is reduced, but the response speed and charging time of the light-emitting device deteriorates

Engineering Contradiction:
Improvereset voltage line structureVSAvoidresponse speed of pixel circuit
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent divides the reset voltage supply into two separate lines: a first reset voltage line for resetting the pixel circuit and a second reset voltage line for resetting the light-emitting device. This segmentation allows independent optimization of reset timing and voltage levels for each component, enabling the pixel circuit to be fully reset before the light-emitting device begins charging, thereby improving response speed without excessive complexity increase.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary resetting of the pixel circuit through the first reset voltage line before the light-emitting device starts charging via the second reset voltage line. This preliminary action ensures that the pixel circuit is completely reset in advance, eliminating any residual charges that would slow down the subsequent charging process and improve overall response speed.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If the reset voltage is set high to ensure thorough pixel circuit reset, then the reset accuracy is improved, but the power consumption increases

Engineering Contradiction:
Improvereset accuracy of pixel circuitVSAvoidpower consumption of pixel circuit
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies different voltage levels to different reset operations through separate voltage lines. The first reset voltage line provides a first reset voltage optimized for pixel circuit reset accuracy, while the second reset voltage line provides a second reset voltage optimized for light-emitting device reset. This local quality approach allows each component to receive precisely the voltage it needs, ensuring thorough reset without unnecessarily high power consumption across the entire system.

Inventive Principle:
Principle #3Local quality

3Stability of the object's composition

If the charging time of light-emitting device is extended to ensure adequate charging, then the display uniformity is improved, but the response speed deteriorates

Engineering Contradiction:
Improveuniformity of displayVSAvoidcharging time of light-emitting device
Core Design Contradiction:
Stability of the object's compositionVSLoss of time

Solution Approach 1:

The patent uses the first reset voltage line to completely reset the pixel circuit in advance before the second reset voltage line begins charging the light-emitting device. This preliminary action eliminates the need to extend charging time to account for incomplete pixel circuit reset, allowing the light-emitting device to charge efficiently without compromising display uniformity, thus reducing overall charging time while maintaining display quality.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12347374B2Array substrate for display panel improving response speed of pixel circuit
Publication Date: 2025.07.01 BOE TECHNOLOGY GROUP CO LTD
  • US12347374B2 patent drawing
  • US12347374B2 patent drawing
  • US12347374B2 patent drawing

AI summary

Embodiments of the present disclosure provide a display panel. The display panel includes a substrate and first and second active layers and first and second source and drain layers arranged sequentially in a direction away from the substrate. The second source and drain layer has a power line extending in a column direction, the power line includes an extension portion. A size of the extension portion in a row direction is greater than a size of the rest of the power line in the row direction. The second active layer is connected to a first conductive portion through a first via hole, the first conductive portion is connected to the first active layer through a second via hole, and an orthographic projection of the extension portion on the substrate covers an orthographic projection of the first via hole on the substrate.