Array Substrate Dual TFT Design for Display Flicker Reduction
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Solution Overview
Problem
Manufacturing processes for liquid crystal display array substrates are affected by process parameters, materials, and impurity ions, leading to issues like flicker and residual images due to unequal working voltages in positive and negative frames.
Innovation Solution
The array substrate design includes sub-pixel units with first and second thin film transistors, pixel electrodes in different layers, and staggered slits, allowing for equal working voltages in positive and negative frames by adjusting the distance between pixel electrodes and a common electrode, and using a driving method that inputs scan signals and data signals in specific frames to achieve balanced electric field intensities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single thin film transistor is used in each sub-pixel unit, then the device complexity is reduced, but the working voltages in positive and negative frames become unequal causing flicker and residual image
Solution Approach 1:
The patent divides the single thin film transistor into two separate thin film transistors (first TFT and second TFT) in each sub-pixel unit. The first TFT controls the first pixel electrode while the second TFT controls the second pixel electrode, allowing independent voltage control for positive and negative frames respectively. This segmentation resolves the voltage equality issue while maintaining manageable device complexity.
Solution Approach 2:
The patent introduces a temporal dimension by using two pixel electrodes in different layers (first pixel electrode in first layer, second pixel electrode in second layer) that are insulated from each other. This spatial-temporal arrangement allows the display to alternate between positive and negative frames using different transistors and electrodes, achieving equal working voltages without increasing complexity in a single layer.
2Reliability
If two thin film transistors are used in each sub-pixel unit, then equal working voltages in positive and negative frames are achieved, but the device complexity increases
Solution Approach 1:
The patent merges the control functions of two thin film transistors into a unified structure where both TFTs share common source and drain electrodes. The first source electrode and second source electrode are connected to the same data line, and the first drain electrode and second drain electrode are connected to the same common electrode. This merging approach achieves equal working voltages while minimizing the increase in device complexity.
Solution Approach 2:
The common source and drain electrodes serve multiple functions: they act as source/drain for both the first TFT and second TFT, and also serve as common electrodes for both pixel electrodes. This multi-functionality reduces the overall number of separate components needed, offsetting the complexity increase from having two transistors per sub-pixel unit.
3Ease of manufacture
If pixel electrodes are disposed in the same layer, then the manufacturing process is simplified, but electric field interference occurs between adjacent electrodes
Solution Approach 1:
The patent moves the second pixel electrode to a different layer (second layer) compared to the first pixel electrode (first layer), with the layers being insulated from each other. This vertical separation in the third dimension eliminates electric field interference between adjacent pixel electrodes while maintaining ease of manufacture through standard multi-layer fabrication processes.
Solution Approach 2:
The patent introduces an insulating layer between the first pixel electrode and second pixel electrode to prevent electric field interference. This intermediary insulating structure allows both electrodes to function simultaneously without mutual interference, maintaining manufacturing simplicity while eliminating harmful electric field coupling.
4Device complexity
If no slits are provided in pixel electrodes, then the electrode structure is simpler, but liquid crystal alignment is insufficient
Solution Approach 1:
The patent introduces slits at specific locations in the pixel electrodes (first slits in first pixel electrode, second slits in second pixel electrode) to create localized electric field variations. These strategically placed slits provide the necessary liquid crystal alignment function without requiring complete structural complexity throughout the entire electrode, achieving local quality optimization.
Solution Approach 2:
The patent employs asymmetric slit configurations where the first slits and second slits are disposed staggered with respect to each other, and the slits have different orientations (first slits in first direction, second slits in second direction). This asymmetric arrangement creates the necessary electric field patterns for liquid crystal alignment while maintaining relatively simple electrode overall structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration alleviates flicker and residual image issues by ensuring equal working voltages in positive and negative frames, improving the yield and performance of liquid crystal display devices.
Implementation Method 1
the common electrode is configured to respectively produce electric fields with the first pixel electrode and the second pixel electrode
Implementation Method 2
a liquid crystal display comprises a display panel and a backlight; and a display panel comprises an array substrate, an opposite substrate, and a liquid crystal layer disposed between the array substrate and the opposite substrate
Data Source
AI summary
An array substrate and a manufacturing method thereof, and a display panel including the array substrate and a driving method thereof are provided. Each of the sub-pixel units of the array substrate includes a first thin film transistor and a second thin film transistor; the first thin film transistor includes a first gate electrode, a first source electrode and a first drain electrode; the second thin film transistor includes a second gate electrode, a second source electrode and a second drain electrode; each of the sub-pixel unit further includes a first pixel electrode electrically connected to the first drain electrode, a second pixel electrode electrically connected to the second drain electrode; and the first pixel electrode and the second pixel electrode are disposed in different layers and insulated with each other.