Array Substrate Direct Electrode Attachment for LCD

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Solution Overview

Problem

In liquid crystal display devices, the small or irregularly shaped via holes in the passivation layer between pixel electrodes and drain electrodes lead to high resistance, resulting in lower charging efficiency and poor liquid crystal display performance.

Innovation Solution

The pixel electrodes and drain electrodes are directly attached to each other without via holes, eliminating the need for a passivation layer and reducing electrical resistance, and a passivation layer is added to prevent impurity-induced short circuits and improve substrate flatness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If via holes are used to connect pixel electrodes and drain electrodes through the passivation layer, then electrical connection is achieved, but the resistance is high due to small or irregular via hole sizes

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidcharging efficiency
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent removes the passivation layer from the connection region between pixel electrodes and drain electrodes, eliminating via holes entirely. This extraction of the problematic passivation layer directly resolves the high resistance issue while maintaining electrical connection through direct metal-to-metal contact.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of connecting electrodes through holes in the passivation layer (conventional approach), the patent inverts the approach by making the passivation layer itself conductive in the connection region, allowing current to flow through the passivation layer material rather than through via holes.

Inventive Principle:
Principle #13The other way round (Inversion)

2Reliability

If a passivation layer is present between pixel electrodes and drain electrodes, then impurity protection is provided, but electrical resistance increases due to via hole constraints

Engineering Contradiction:
Improveimpurity protectionVSAvoidvia hole size consistency
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The passivation layer is treated differently in different regions: in the connection region between pixel electrodes and drain electrodes, it is made conductive to allow current flow, while in other regions it maintains its insulating and protective functions. This local differentiation resolves both the protection and conductivity requirements.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The electrical conductivity parameter of the passivation layer is changed in the connection region through doping or material composition adjustment, transforming it from an insulator to a conductor locally, thereby eliminating via hole requirements while maintaining impurity protection in non-conductive regions.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If via holes are formed in the passivation layer for electrode connection, then electrical connection is established, but charging efficiency decreases due to high resistance

Engineering Contradiction:
Improveelectrode connection structureVSAvoidcharging efficiency
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The patent extracts and removes the via hole structure from the manufacturing process, directly connecting pixel electrodes and drain electrodes through their respective metal layers without requiring hole formation, filling, and planarization steps, thereby improving charging efficiency.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The passivation layer is pre-designed with conductive properties in the connection region before final electrode formation, ensuring that low-resistance pathways are already in place before subsequent manufacturing steps, thereby guaranteeing high charging efficiency.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10042216B2Array substrate and manufacturing method thereof, liquid crystal panel and liquid crystal display device
Publication Date: 2018.08.07 BOE TECHNOLOGY GROUP CO LTD
  • US10042216B2 patent drawing
  • US10042216B2 patent drawing
  • US10042216B2 patent drawing

AI summary

An embodiment of the present disclosure discloses an array substrate, including a base substrate, a drain electrode of a thin film transistor and a pixel electrode corresponding to the drain electrode arranged on the base substrate, wherein the pixel electrode and the drain electrode are attached to each other.