Array Substrate Etch Prevention Layer for Oxide Semiconductor Protection
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Solution Overview
Problem
The existing manufacturing methods for array substrates with oxide semiconductor thin film transistors face challenges such as damage from etchants, poor adhesion of metal electrodes, and increased manufacturing costs due to complex mask processes and high defect rates.
Innovation Solution
A method involving a single mask process to form an etch prevention layer on the oxide semiconductor layer, preventing exposure to etchants and simplifying the manufacturing process by reducing the number of mask steps, thereby enhancing adhesion and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single mask process is used to form the etch prevention layer, then the manufacturing process is simplified and productivity is improved, but the manufacturing precision may be compromised due to the complexity of forming multiple layers in one step
Solution Approach 1:
The patent combines the formation of the oxide semiconductor layer and the etch prevention layer into a single mask process step. By depositing both layers simultaneously through a single mask, the manufacturing process is simplified and productivity is improved while maintaining acceptable pattern accuracy through proper material selection and deposition control.
2Device complexity
If the oxide semiconductor layer is exposed to etchants during source and drain electrode formation, then the manufacturing process is simplified, but the oxide semiconductor layer is damaged and transistor performance deteriorates
Solution Approach 1:
The patent introduces an etch prevention layer as an intermediary between the oxide semiconductor layer and the etchant used during source and drain electrode formation. This etch prevention layer acts as a protective barrier that prevents the etchant from damaging the oxide semiconductor layer, thereby maintaining transistor performance while allowing the manufacturing process to proceed efficiently.
3Device complexity
If metal electrodes are formed directly on the oxide semiconductor layer, then the manufacturing process is simplified, but adhesion is poor and device reliability decreases
Solution Approach 1:
The patent introduces the etch prevention layer as an intermediary layer between the oxide semiconductor layer and the metal electrodes. This intermediate layer provides improved adhesion between the metal electrodes and the oxide semiconductor layer, enhancing device reliability while maintaining a relatively simple manufacturing process.
4Reliability
If multiple mask processes are used to form the etch prevention layer separately, then the adhesion and protection are improved, but the manufacturing cost increases and productivity decreases
Solution Approach 1:
The patent combines the formation of the oxide semiconductor layer and the etch prevention layer into a single mask process step. This merging of steps maintains the protective and adhesive functions of the etch prevention layer while improving manufacturing throughput and reducing production costs by eliminating separate processing steps.
Data Source
AI summary
A method of fabricating an array substrate and a display device including the array substrate are discussed. According to an embodiment, the array substrate includes a gate electrode formed on a substrate; a gate insulating layer formed on the gate electrode; an oxide semiconductor layer and an etch prevention layer formed on the gate insulating layer, wherein ends of the oxide semiconductor layer and ends of the etch prevention layer are aligned with each other; source and drain electrodes formed on the etch prevention layer; a passivation layer including a contact hole formed on the source and drain electrodes and on the gate insulating layer; and a pixel electrode formed on the passivation layer and through the contact hole.