Array Substrate Fan-Out Layout for Narrow-Bezel Touch Displays

The patent applies multi-layer wiring design where signal lines are routed across different conductive layers (first conductive layer and second conductive layer). This vertical dimensionality change allows signal lines that would otherwise be densely packed in the same plane to be separated in the Z-direction, reducing the horizontal frame width while maintaining signal integrity through proper layer stacking and via connections.

The patent segments the routing path into multiple sections across different conductive layers. By dividing the signal transmission path into layer-specific segments (e.g., some segments in the first conductive layer, others in the second conductive layer), the design reduces the need for wide continuous routing in a single layer, thereby reducing frame width while maintaining conductivity through controlled inter-layer transitions.

By utilizing multiple conductive layers separated in the vertical direction, the patent reduces the horizontal proximity between adjacent signal lines. This spatial separation in the Z-dimension minimizes the risk of short circuits between neighboring lines while maintaining uniform conductivity within each layer, thereby improving process yield without sacrificing electrical performance.

The patent implements different wiring configurations in different regions and layers. Each conductive layer can be optimized locally for its specific routing requirements, allowing for narrower line widths and tighter spacing in certain areas while maintaining adequate conductivity through localized design adjustments and inter-layer connectivity.