Array Substrate Functional Layer Protects Active Layer

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Solution Overview

Problem

Current display panels damage the active layer during preparation, leading to decreased performance of IGZO thin film transistors due to oxygen vacancy defects and etching effects from photoresist stripping solutions.

Innovation Solution

An array substrate design with a functional layer positioned between the active layer and the gate insulating layer, featuring a through-hole connection for the source/drain layer, which protects the active layer from damage and ensures proper conductivity, using materials like indium gallium zinc oxide and metal oxides for enhanced performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If photoresist stripping solution is used during preparation, then the preparation process can be completed, but the active layer is damaged due to etching effects

Engineering Contradiction:
Improvepreparation process completionVSAvoidactive layer damage
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a protective layer as an intermediary between the photoresist stripping solution and the active layer. This protective layer allows the stripping solution to perform its function while preventing direct contact with and damage to the active layer, thus resolving the contradiction between completing the preparation process and avoiding active layer damage.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies a protective coating to the active layer before the photoresist stripping process. This preliminary protective action prevents the harmful etching effect from occurring in the first place, allowing the stripping solution to be used without damaging the active layer.

Inventive Principle:
Principle #9Preliminary anti-action

2Productivity

If yellow light process is applied, then the preparation process can proceed, but oxygen vacancy defect state increases in the IGZO layer

Engineering Contradiction:
Improvepreparation process efficiencyVSAvoidIGZO transistor performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent performs the yellow light process in an inert atmosphere or under controlled environmental conditions that prevent the formation of oxygen vacancy defects. This allows the photolithography process to proceed efficiently while protecting the IGZO layer from degradation, thus maintaining both productivity and transistor performance.

Inventive Principle:
Principle #39Inert atmosphere (Inert environment)

Solution Approach 2:

The patent applies a protective treatment or coating to the IGZO layer before the yellow light process. This preliminary action prepares the IGZO layer to withstand the yellow light exposure without developing oxygen vacancy defects, thereby maintaining transistor performance while allowing the preparation process to continue.

Inventive Principle:
Principle #10Preliminary action

3Object-affected harmful factors

If functional layer is added to protect active layer, then active layer damage is prevented, but device structure becomes more complex

Engineering Contradiction:
Improveactive layer protectionVSAvoidlayer structure complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent designs the functional layer to serve multiple purposes: protecting the active layer from damage, providing electrical connection, and potentially serving as part of the transistor structure itself. By making the protective layer multi-functional, the patent reduces the need for additional separate components, thereby limiting the increase in device complexity while maintaining protection.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11404579B2Array substrate and manufacturing method thereof, and display panel
Publication Date: 2022.08.02 SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
  • US11404579B2 patent drawing
  • US11404579B2 patent drawing
  • US11404579B2 patent drawing

AI summary

The present disclosure provides an array substrate and a manufacturing method thereof, and a display panel. In the array substrate, a functional layer disposed between an active layer and a gate insulating layer protects the active layer during etching of the active layer, which prevents the active layer from damage and conducts a source/drain layer and the active layer, so that transistors in the array substrate work normally, solving the technical problem that current display panels damage the active layer during a preparation process, which causes performance of thin film transistors to decrease.