Array Substrate Gate Electrode Self-Aligned Masking
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Solution Overview
Problem
The existing methods for manufacturing array substrates in TFT LCDs face misalignment issues during the formation of the active layer due to inaccuracies in mask alignment, leading to inhomogeneous luminance in displays.
Innovation Solution
The method involves using the gate electrode and gate line as a mask to pattern the semiconductive film, ensuring the source semiconductive layer is formed at the correct location, which in turn allows the target semiconductive layer to be accurately positioned, thereby avoiding misalignment and leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a mask is used to pattern the semiconductive film for forming the active layer, then the active layer can be formed, but misalignment between the mask and gate electrode occurs leading to inhomogeneous luminance
Solution Approach 1:
The gate electrode serves a dual function: as an electrical component and as a self-aligned mask for patterning the active layer. By utilizing the gate electrode's own structure as the masking element, the invention eliminates misalignment issues between separate masks and electrodes, achieving self-aligned patterning that ensures both precision and luminance uniformity
Solution Approach 2:
The gate electrode is assigned multiple functions: it acts as both the functional electrical component and as the masking structure for patterning. This multi-functionality reduces the number of separate components needed and ensures automatic alignment since the gate electrode defines both the electrical connection points and the active layer boundaries
2Manufacturing precision
If multiple patterning processes are used to form the active layer and source/drain electrodes, then precise positioning can be achieved, but the manufacturing complexity and time increase
Solution Approach 1:
The invention combines the patterning of the active layer and source/drain electrodes into a single etching process. By using the gate electrode as a unified mask structure, both the active layer pattern and source/drain electrode positions are defined simultaneously, reducing multiple sequential patterning steps into one integrated process that maintains precision while improving productivity
Solution Approach 2:
The gate electrode is formed first with pre-defined patterns that serve as the masking structure for subsequent patterning. This preliminary formation of the gate electrode with integrated mask features enables the active layer and source/drain regions to be patterned in a single subsequent step, eliminating the need for multiple intermediate patterning processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents misalignment of the active layer, reduces the cost of the masking process, and ensures uniform luminance by directly utilizing the gate line and gate electrode as an opaque mask, thereby enhancing the manufacturing efficiency and display quality.
Implementation Method 1
exposing the positive photoresist film from a second surface opposite to the first surface of the substrate
Data Source
AI summary
The present disclosure provides a method for manufacturing an array substrate, an array substrate and a display device. The method includes: forming a gate line, a gate electrode and an insulating layer which covers the gate line and the gate electrode on a first surface of a substrate; forming a semiconductive film on the insulating layer; patterning the semiconductive film using the gate electrode and the gate line as a mask, so as to form an source semiconductive layer at a region where the gate line and the gate electrode are located; and manufacturing a target semiconductive layer using the source semiconductive layer.