Array Substrate Gate Line Configuration for High Aperture Ratio
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Solution Overview
Problem
In liquid crystal display technology, the gap between gate lines and pixel units causes a halo effect, which is mitigated by using a Black Matrix (BM), but increasing BM width reduces light transmission, hindering the development of high aperture ratio displays.
Innovation Solution
The array substrate is designed with gate lines configured to drive sub-pixel rows, with these lines located between the sub-pixel rows within a pixel unit, reducing the BM width and enhancing light transmission efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a Black Matrix (BM) is used to cover the halo caused by the gap between gate line and pixel unit, then the halo effect is mitigated, but the light transmission region decreases due to larger BM width
Solution Approach 1:
The patent extracts and removes the Black Matrix component entirely from the display structure. By eliminating the BM, the patent achieves maximum light transmission area while managing the halo effect through alternative means (gate line positioning and pixel electrode design) rather than relying on light-blocking materials.
Solution Approach 2:
The patent addresses the halo effect not by adding width in the horizontal dimension (which would increase BM area and reduce light transmission), but by adjusting the vertical positioning of gate lines relative to pixel units. This dimensional shift allows halo management without sacrificing aperture ratio.
2Object-affected harmful factors
If the BM width is increased to cover the halo, then the halo effect is reduced, but the aperture ratio decreases due to smaller light transmission region
Solution Approach 1:
The patent completely removes the Black Matrix from the display structure, eliminating the need to balance BM width against aperture ratio. This extraction allows the aperture ratio to approach maximum values while managing halo effects through gate line and pixel electrode design.
Solution Approach 2:
The patent changes the positioning parameters of gate lines, placing them between pixel units rather than having them overlap with pixel areas. This parameter adjustment manages the halo effect without requiring wide BM structures, thereby preserving high aperture ratio.
3Illumination intensity
If gate lines are positioned to drive sub-pixel rows with lines located between sub-pixel rows, then the BM width is reduced and light transmission is enhanced, but the manufacturing precision requirement increases
Solution Approach 1:
The patent segments the gate line structure into distinct portions positioned between sub-pixel rows, with each gate line serving specific sub-pixel rows. This segmentation allows for standardized positioning patterns that can be manufactured with consistent precision across the display panel.
Solution Approach 2:
The patent combines multiple functions into the gate line structure: driving sub-pixel rows, defining pixel unit boundaries, and managing halo effects. By merging these functions into a single positioning system, the patent reduces the number of separate precision requirements compared to having separate BM and gate line positioning.
Data Source
AI summary
The present disclosure relates to an array substrate, a method of manufacturing the same, a display panel and a display device. The array substrate includes: a plurality of pixel units, the plurality of pixel units being arranged in rows and columns and each row of the pixel units comprising a first sub-pixel row, a second sub-pixel row and a third sub-pixel row being adjacent successively; and a plurality of gate lines, each of the gate lines being configured to drive one sub-pixel row, and gate lines for driving the first sub-pixel row and the second sub-pixel row in a same pixel unit being located between the first sub-pixel row and the second sub-pixel row in the pixel unit.