Array Substrate Gate Region Segmentation for Yield Improvement
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Solution Overview
Problem
In the fabrication of array substrates, residual conductive metal at the edges of the gate region often causes short circuits between pixel electrodes and data lines, leading to dark points in displayed images due to incomplete cleaning of the active layer.
Innovation Solution
The array substrate design includes gate regions, gate lines, data lines, and pixel electrodes with specific geometries and orientations, such as protrusions and retractions, to reduce the area of the gate region extending into the pixel region, minimizing residual metal and enhancing cleaning efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate region extends to the pixel region with a large area, then the gate line can effectively control the pixel region, but residual conductive metal remains at the edges causing short circuits
Solution Approach 1:
The gate region is divided into two parts: a first gate region in the gate line extension direction and a second gate region protruding toward the pixel region. This segmentation reduces the edge length in the pixel region while maintaining control functionality, thereby reducing residual metal and preventing short circuits.
Solution Approach 2:
The gate region has different geometrical characteristics in different areas: the first gate region has a standard width along the gate line, while the second gate region has a reduced width when protruding toward the pixel region. This local variation in geometry reduces the area where residual metal can accumulate at critical edges.
2Productivity
If the gate region has a large area extending to the pixel region, then the gate control is comprehensive, but the cleaning solution cannot effectively remove metal residue
Solution Approach 1:
By segmenting the gate region into a first gate region and a second gate region with reduced protrusion, the edge length exposed to the cleaning solution is reduced. This segmentation allows the cleaning solution to more effectively remove metal residues from the active layer, improving cleaning efficiency and yield rate.
3Illumination intensity
If the gate region extends extensively to the pixel region, then the gate line coverage is sufficient, but residual metal causes voltage reduction and dark points
Solution Approach 1:
The gate region is segmented to reduce the edge length in the pixel region, minimizing residual conductive metal that would otherwise create short circuits. This prevents voltage reduction and dark points, ensuring proper electrical performance and image brightness.
Solution Approach 2:
The gate region geometry is locally optimized by reducing the protrusion width in the second gate region near the pixel region. This local modification reduces residual metal accumulation at critical locations, preventing short circuits that would cause dark points and electrical performance degradation.
Data Source
AI summary
The present disclosure discloses an array substrate, a display panel and a display device. The array substrate includes gate regions, gate lines, data lines, pixel electrodes and common electrode lines. The common electrode lines and the gate lines have the same extension direction, the pixel electrodes are located in regions defined by adjacent gate lines and adjacent data lines, the gate lines traverse the gate regions in the extension direction that are located in the same row as the gate lines, and the pixel electrodes have a gap from the gate lines at ends thereof closer to the gate lines. As such, a portion of the gate region that extends to the pixel region has a reduced area and hence a reduced edge length. This way, during the cleaning of the active layer after formation, less active layer metal may remain at the edges of the gate region. Thereby, the array substrate fabrication process is improved, and a product yield rate of the array substrate is increased.