Array Substrate Gate Line Sharing Reduces COF Count
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Solution Overview
Problem
The existing design of array substrates in liquid crystal display devices requires a large number of gate lines and data lines, leading to increased Chip On Film (COF) usage and manufacturing costs.
Innovation Solution
The array substrate unit is redesigned with four array substrate sub-units, where each sub-unit includes three pixels connected to three gate lines and one data line, with the gate lines shared between sub-units in the horizontal direction and the data line shared between sub-units in the vertical direction, reducing the total number of gate lines and data lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional array substrate designs with separate gate lines and data lines for each pixel are used, then each pixel can be independently controlled, but the number of COF required increases significantly
Solution Approach 1:
The patent merges multiple gate lines into a shared gate line structure. Specifically, even-numbered gate lines (G2, G4, G6, etc.) are connected to the same gate line electrode, and odd-numbered gate lines (G1, G3, G5, etc.) are connected to another gate line electrode. This merging reduces the number of separate COF connections needed while maintaining the ability to independently control different pixel rows through selective activation of these shared gate line electrodes.
Solution Approach 2:
The shared gate line electrodes serve multiple functions: they act as common connection lines for multiple pixel rows, reduce the overall COF count, and maintain independent control capability through selective voltage application. The same gate line electrode structure serves both as a simplifying connection mechanism and as a functional control element for multiple pixels simultaneously.
2Ease of operation
If more gate lines and data lines are provided for better pixel control, then pixel switching capability is improved, but manufacturing cost increases due to more COF
Solution Approach 1:
Multiple gate line connections are merged into shared electrode structures. The patent connects even-numbered gate lines to one shared electrode and odd-numbered gate lines to another shared electrode, reducing the total number of discrete COF components needed and thereby lowering manufacturing complexity and cost.
Solution Approach 2:
The shared gate line electrodes perform multiple functions: they provide common electrical connections for multiple pixel rows, enable independent row selection through selective activation, and reduce the overall component count. This multi-functionality maintains full pixel control capability while simplifying the manufacturing process and reducing costs.
Data Source
AI summary
Embodiments of the invention provide an array substrate, a liquid crystal display panel and a liquid crystal display device. The array substrate comprises a plurality of array substrate units, each of which comprising: gate lines and data lines extending along a first direction and a second direction crossing with each other, respectively, in a plane of a substrate. Each array substrate unit comprises four array substrate sub-units which are arranged in the first direction and the second direction to form sub-unit rows and sub-unit columns, and each of sub-unit rows and sub-unit columns has two array substrate sub-units. The three gate lines are shared by two array substrate sub-units in each sub-unit row, and the one data line and one of the gate lines are shared by two array substrate sub-units in each sub-unit column.