Array Substrate Gate Electrode Wrapping for Aperture Ratio
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Solution Overview
Problem
High-resolution liquid crystal display devices face a decrease in aperture ratio due to the increasing size of light-blocking regions for thin film transistors, leading to degraded image quality.
Innovation Solution
The design of an array substrate with a specific configuration of electrodes and insulation layers, including a semiconductor pattern layer with a channel that electrically connects the source and drain electrodes, and a gate electrode arrangement that overlaps with the source, semiconductor, and drain electrodes, reduces the horizontal area occupied by thin film transistors, thereby increasing the aperture ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of pixels in a display region is increased to achieve high resolution, then the resolution is improved, but the aperture ratio decreases due to larger light-blocking regions for thin film transistors
Solution Approach 1:
The gate electrode is extended from a planar configuration to a three-dimensional structure that wraps around the semiconductor pattern layer, utilizing vertical and lateral dimensions simultaneously. This spatial reconfiguration reduces the horizontal footprint of the thin film transistor while maintaining electrical functionality, thereby increasing the aperture ratio without compromising resolution
Solution Approach 2:
The gate electrode is positioned to overlap with the source electrode, semiconductor pattern layer, and drain electrode in a nested arrangement. This nesting allows the gate electrode to control the channel while occupying minimal additional horizontal space, effectively reducing the light-blocking region area and improving aperture ratio
2Area of stationary object
If the area occupied by thin film transistors in each pixel is reduced to increase aperture ratio, then the aperture ratio is improved, but the electrical characteristics of the thin film transistor may become unstable
Solution Approach 1:
By extending the gate electrode vertically and laterally to wrap around the semiconductor pattern layer, the effective gate control area is increased without increasing the horizontal footprint. This three-dimensional configuration provides sufficient electrical control for stable transistor characteristics while maintaining a compact layout that preserves aperture ratio
Solution Approach 2:
The gate electrode is configured to overlap with multiple components (source electrode, semiconductor pattern layer, and drain electrode) simultaneously, merging multiple functional regions into a compact structure. This overlapping arrangement ensures stable electrical characteristics through adequate gate control while minimizing the overall area occupied by the thin film transistor
Data Source
AI summary
An array substrate includes a first substrate, a source electrode disposed on the first substrate, a semiconductor pattern layer disposed on the source electrode, a drain electrode disposed on the semiconductor pattern layer, a pixel electrode disposed on the drain electrode and a gate electrode disposed on at least one side surface of the semiconductor pattern layer. A method of making the solar panel is provided. A method of making the array substrate is provided.