Array Substrate GND Protection Circuit via Segmented Conductive Patterns
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Solution Overview
Problem
Electronic products, particularly display panels, are vulnerable to damage from Electro-Static Discharge (ESD) due to insufficient electrostatic protection, as the existing grounding systems are inadequate in managing excessive static charges, leading to potential permanent damage.
Innovation Solution
An array substrate with a GND protection circuit comprising two conductive patterns and an insulating layer, where the conductive segments are connected through via holes, increasing the overall resistance and enhancing electrostatic protection without requiring additional film layers or manufacturing steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a grounding point is arranged on the array substrate to release static charges, then the electrostatic protection is provided, but the components are damaged by excessive current from ESD
Solution Approach 1:
The conductive layer is divided into multiple isolated conductive segments instead of a continuous grounding pattern. These segments are spaced apart and connected through high-resistance via holes, creating a segmented structure that limits current flow while still providing electrostatic discharge capability
Solution Approach 2:
The resistance parameter of the grounding system is changed by introducing via holes with inherently high resistance between the conductive segments and the underlying grounding layer. This transforms the grounding system from low-resistance to high-resistance, limiting ESD current while maintaining electrostatic protection function
2Ease of operation
If the conductive pattern has low resistance to effectively ground static charges, then the electrostatic discharge capability is improved, but the ESD current exceeds the protection capability of the GND
Solution Approach 1:
The resistance of the conductive pattern is intentionally increased from low to high by introducing via holes with high contact resistance. This parameter change allows the system to discharge static charges effectively while limiting the peak ESD current to protectable levels
Solution Approach 2:
The via holes act as intermediary elements between the conductive segments and the grounding layer. Their high resistance property serves as a current-limiting interface that mediates between the need for charge discharge and the need for ESD protection
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The increased resistance in the GND protection circuit effectively mitigates ESD damage by increasing the resistance at the via holes, thereby improving the display panel's ability to withstand electrostatic discharges, ensuring product reliability and simplifying the manufacturing process.
Implementation Method 1
Because the resistance at the via hole where the two film layers form an electrical connection is large, the whole conductive pattern may have a relative large resistance
Data Source
AI summary
The present disclosure provides an array substrate, a display panel and a display device. The array substrate includes a first conductive pattern and a second conductive pattern forming a ground (GND) protection circuit. The first conductive pattern includes a plurality of first conductive segments spaced apart from each other, and adjacent first conductive segments are connected to each other by the second conductive pattern, an insulating layer is arranged between the first conductive segments and the second conductive pattern, and the first conductive segments are connected to the second conductive pattern through via holes penetrating through the insulating layer. In addition, the present disclosure provides a display panel including the above array substrate. Furthermore, the present disclosure provides a display device including the above array substrate.


