Array Substrate GOA Region Bezel Width Reduction
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Solution Overview
Problem
In twisted nematic (TN) type display panels with gate drive on array (GOA) design, the conductive connection between the indium tin oxide (ITO) electrode layer and the pixel electrode through via holes leads to display defects, resulting in a wider bezel due to the need for packaging adhesive to be coated at a distance from the GOA region.
Innovation Solution
A method for manufacturing an array substrate involving the formation of a thin film transistor structure with specific via holes and an ITO layer, where the photoresist layer is exposed and developed using a halftone mask plate to create electrode layers with varying thicknesses, allowing the photoresist to remain and cover the via holes in the GOA region, preventing conductive connection with the ITO electrode layer during sealant application.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the array substrate is conductive with the ITO electrode layer at the via holes of the GOA region, then the electrical connection is achieved, but display defects are caused
Solution Approach 1:
The patent divides the electrode layer into two distinct regions: the display region electrode layer and the GOA region electrode layer. These layers are electrically isolated from each other, allowing the display region to be conductive with the ITO electrode layer while the GOA region remains isolated. This segmentation resolves the contradiction by enabling electrical connection where needed (display region) while preventing harmful conduction where not needed (GOA region via holes).
Solution Approach 2:
The patent applies different electrical properties to different regions of the electrode layer. The display region electrode layer is designed to be conductive for proper display function, while the GOA region electrode layer is designed to be isolated to prevent display defects. This local differentiation of electrical properties allows the system to achieve both electrical connection and defect prevention in appropriate locations.
2Object-affected harmful factors
If the packaging adhesive is coated at a certain distance from the GOA region, then display defects are prevented, but the bezel width increases
Solution Approach 1:
By segmenting the electrode layer into display and GOA regions with different electrical properties, the patent eliminates the need for a safety margin between the packaging adhesive and GOA region. The electrical isolation at the GOA region boundary allows the packaging adhesive to be coated directly on or near the GOA region without causing display defects, thus reducing bezel width.
Solution Approach 2:
The patent implements preliminary electrical isolation at the GOA region electrode layer before the packaging adhesive coating process. This pre-established isolation measure allows the packaging adhesive to be coated closer to the GOA region without risk of causing display defects, thereby reducing the required bezel width.
3Ease of manufacture
If the electrode layer in the GOA region is completely removed, then the via holes are exposed, but conductive connection with the ITO electrode layer occurs
Solution Approach 1:
The patent applies different thickness characteristics of the electrode layer to different regions. The display region electrode layer is completely removed to expose via holes for proper electrical connection, while the GOA region electrode layer is retained with sufficient thickness to maintain electrical isolation. This local differentiation resolves the contradiction between via hole exposure and conductive connection control.
Solution Approach 2:
Instead of completely removing the electrode layer across the entire substrate, the patent applies partial removal action - completely removing the electrode layer in the display region while retaining it in the GOA region. This selective partial action achieves via hole exposure where needed while maintaining electrical isolation where required.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the bezel width by allowing the sealant to be applied directly on the GOA region without causing conductive defects, facilitating the production of TN type display panels with a narrow bezel.
Implementation Method 1
exposing and developing the photoresist layer using a halftone mask plate, and etching the ITO layer
Implementation Method 2
etching the ITO layer, to form an electrode layer in the GOA region and an electrode layer in the display region
Implementation Method 3
ashing the remaining photoresist to completely remove the photoresist on the electrode layer in the display region and to thinning the photoresist on the electrode layer in the GOA region
Data Source
AI summary
An array substrate and a method for manufacturing the same, and a display device are provided. The method includes: forming a thin film transistor (TFT) structure of a display region and a TFT structure of the GOA region on a substrate; sequentially forming a first insulating layer, an indium tin oxide (ITO) layer and a photoresist layer on the TFT structure; exposing and developing the photoresist layer using a halftone mask plate, and etching the ITO layer, to form an electrode layer in the GOA region and an electrode layer in the display region; and ashing the remaining photoresist to completely remove the photoresist on the electrode layer in the display region and to thinning the photoresist on the electrode layer in the GOA region.