Array Substrate GOA Layout for Narrow-Bezel Display Panels
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Solution Overview
Problem
The challenge in display panel design is to achieve a narrow bezel to increase the screen-to-body ratio and reduce the dimension of the screen bezel.
Innovation Solution
The array substrate design includes a peripheral region with GOA units and gate lines arranged in specific directions, with GOA units positioned on the DPO side, and a connection region with alternating connection lines to minimize bezel width, allowing for a narrow bezel design suitable for in-vehicle and other applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If GOA units are arranged in conventional positions, then electrical connection is maintained, but bezel width increases
Solution Approach 1:
The patent applies dimensionality change by transitioning from conventional horizontal arrangement of GOA units to a vertical arrangement along the second direction. This repositioning allows GOA units to be located in the peripheral region rather than occupying horizontal space, thereby reducing bezel width while maintaining electrical connection functionality through redesigned connection paths.
Solution Approach 2:
The patent inverts the conventional arrangement logic by placing GOA units in the peripheral region and using connection lines that extend from the display region to the peripheral region, rather than having GOA units directly in the display region. This inversion enables narrow bezel design while preserving electrical connectivity.
2Ease of manufacture
If connection lines are arranged in straight lines, then manufacturing is simplified, but signal transmission distance increases
Solution Approach 1:
The patent employs curved connection lines instead of straight lines to connect the display region to the peripheral region where GOA units are located. The curved paths reduce the effective transmission distance compared to straight lines extending across the entire panel, while remaining manufacturable using standard photolithography processes.
Data Source
AI summary
Provided is an array substrate, including a substrate. The substrate includes a display region and a peripheral region surrounding the display region. The display region includes a plurality of pixel regions arranged in arrays. The array substrate further includes a plurality of GOA units and a plurality of gate lines. The plurality of GOA units are arranged along a first direction. The peripheral region includes a data pad (DP) region and a data pad opposite (DPO) region that are arranged opposite to each other along a second direction on two sides of the display region. The plurality of GOA units are within the DPO region, the plurality of gate lines are within the display region, and the plurality of GOA units are electrically connected to the plurality of gate lines. The first direction is intersected with the second direction.


