Array Substrate Heat Dissipation Layer for LTPS Crystal Uniformity
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Solution Overview
Problem
The existing Low Temperature Poly-Silicon-Thin Film Transistor (LTPS-TFT) display technology faces challenges in achieving uniform crystal particle sizes and quality due to the metal light-shielding layer, which affects heat dissipation rates and electrical performance.
Innovation Solution
Incorporating a heat dissipation layer between the substrate and the active layer of the thin film transistor, which covers parts of the source and drain regions, increasing their heat dissipation rates relative to the channel region, thereby ensuring the source and drain regions reach crystallization temperature during excimer laser annealing, leading to larger and more uniform crystal particles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal light-shielding layer is provided at the channel region to prevent light irradiation, then light leakage is prevented, but the heat dissipation rate of the source and drain regions becomes slower than the channel region, resulting in poor crystal quality
Solution Approach 1:
The heat dissipation layer is selectively positioned to cover only the source and drain regions while leaving the channel region without additional heat dissipation. This local differentiation creates different heat dissipation rates in different regions, allowing the source and drain regions to cool faster and reach crystallization temperature simultaneously with the channel region, thereby improving crystal particle uniformity without affecting the light shielding function
2Ease of manufacture
If excimer laser annealing is used to convert amorphous silicon to poly-silicon, then the active layer is formed, but the source and drain regions do not reach crystallization temperature due to slower heat dissipation, limiting electrical performance improvement
Solution Approach 1:
The invention changes the thermal parameter (heat dissipation rate) of the source and drain regions by introducing a heat dissipation layer with specific thermal conductivity properties. This parameter modification ensures that during excimer laser annealing, the source and drain regions reach the crystallization temperature (typically above 700°C) at the same time as the channel region, enabling complete crystallization and improving electrical performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the size and uniformity of crystal particles, improving the electrical properties of thin-film transistors by allowing crystal nuclei to grow in the same direction, resulting in better crystal quality and performance.
Implementation Method 1
the heat dissipation layer is configured to make a heat dissipation rate of the source region and the drain region larger than the heat dissipation rate of the channel region
Implementation Method 2
converting the amorphous silicon thin film into a poly-silicon thin film by an excimer laser annealing method
Implementation Method 3
converting the amorphous silicon thin film into a poly-silicon thin film by an excimer laser annealing method
Data Source
AI summary
An array substrate, a manufacturing method thereof and a display device. The array substrate includes a substrate, a thin film transistor on the substrate, and including an active layer including a source region, a drain region and a channel region between the source region and the drain region; a heat dissipation layer disposed between the substrate and the drain region; and the orthographic projection of the heat dissipation layer on the substrate at least covers the orthographic projection of a part of the source region and a part of the drain region on the substrate. The manufacturing method is for the manufacturing of the array substrate. The array substrate can improve the sizes and uniformity of the crystal particles.