Array Substrate Odd-Even Gate Line Inspection Circuit
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Solution Overview
Problem
In liquid crystal display apparatuses, accurately detecting defects on the lower substrate after forming the gate driver is challenging due to difficulties in identifying the source and location of defects.
Innovation Solution
The implementation of an array substrate with a pixel part, a gate driving circuit, a first inspecting circuit, and a second inspecting circuit, where odd-numbered and even-numbered gate lines are separately inspected using distinct circuits to facilitate the detection of electrical defects between pixels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the gate driver is formed simultaneously with the pixels on the lower substrate by a thin film process, then the manufacturing process is simplified and integrated, but the inspectability and ability to detect defect source and location deteriorates
Solution Approach 1:
The gate lines are segmented into odd-numbered and even-numbered groups, with separate inspecting circuits for each group. This segmentation allows independent inspection of different gate line sections, enabling defect location identification while maintaining the integrated thin film process for manufacturing.
2Device complexity
If a single inspecting circuit is used for all gate lines, then the device complexity is reduced, but the measurement precision and defect location accuracy deteriorates
Solution Approach 1:
The inspecting circuit is segmented into multiple independent circuits (first inspecting circuit for odd-numbered gate lines, second inspecting circuit for even-numbered gate lines). Each circuit independently inspects its assigned gate lines, enabling precise defect location identification without significantly increasing overall device complexity.
Data Source
AI summary
In an array substrate and a display apparatus having the array substrate, a pixel part includes gate lines, data lines and pixels electrically connected to the gate and data lines. A gate driving circuit is electrically connected to a first end of the gate lines and applies a gate signal to the gate lines. A first inspecting circuit is electrically connected to odd-numbered gate lines of the gate lines and inspects odd-numbered pixels connected to the odd-numbered gate lines. A second inspecting circuit is electrically connected to even-numbered gate lines of the gate lines and inspects even-numbered pixels connected to the even-numbered gate lines. Thus, electrical defects between the pixels may be easily detected, thereby improving the inspectability for the defects of the array substrate.