Array Substrate Inspection via Single Contact Hole
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Solution Overview
Problem
In COG liquid crystal display panels, existing inspection methods for breaks in wires often result in scratches, electrolytic corrosion, and increased frame size, making it difficult to perform inspections without expanding the frame region, especially with narrow-framed and low-cost designs.
Innovation Solution
An array substrate with parallel scanning and signal lines extended to the frame region, featuring thin film transistors and connection converters with a single contact hole that allows for electrical connection to in-frame wires, enabling wire break inspections without additional inspection terminals, thus minimizing frame expansion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If contact pins are used to inspect bump terminals, then wire breaks can be detected, but the bump terminals are scratched and electrolytic corrosion occurs
Solution Approach 1:
The patent introduces an intermediary inspection terminal structure that connects to signal lines through connection converters rather than directly contacting bump terminals. The inspection terminal serves as a mediator that enables wire break detection through the signal line pathway without physically touching the vulnerable bump terminals, thus avoiding scratch and corrosion damage while maintaining detection capability
Solution Approach 2:
The patent replaces the mechanical contact inspection method (pin probe physically touching bump terminals) with an electrical pathway inspection method. By substituting the mechanical contact system with an electrical signal transmission pathway through connection converters and signal lines, the inspection can be performed without physical contact that causes damage
2Reliability
If inspection terminals are provided in the IC chip mounted region, then wire inspection is enabled, but the frame region must be expanded
Solution Approach 1:
The patent moves the inspection terminal from the horizontal plane (IC chip mounted region) to a different spatial arrangement by connecting through vertical signal lines extending to the frame region. This dimensional repositioning allows inspection functionality to be accessed through the frame region boundary without occupying additional horizontal space in the IC chip mounted area
Solution Approach 2:
The patent makes the signal lines serve multiple functions: they simultaneously transmit display signals and provide inspection pathways. By making the signal lines universal for both display operation and inspection purposes, additional dedicated inspection terminals are not needed, avoiding frame region expansion
3Area of stationary object
If inspection terminals are disposed close to the display region, then frame size is reduced, but electric charge accumulation affects liquid crystal alignment
Solution Approach 1:
The patent extracts the inspection terminal from proximity to the display region and positions it in the frame region instead. By taking out the inspection terminal from the sensitive display area, the source of electric charge accumulation that disrupts liquid crystal alignment is removed from the problematic location, while maintaining inspection functionality through the frame region connection
4Reliability
If multiple contact holes are formed in connection converters, then electrical connection is improved, but manufacturing complexity increases
Solution Approach 1:
The patent uses a single contact hole per connection converter, which is the minimum necessary to achieve the electrical connection function. By applying partial action (one contact hole rather than multiple), the manufacturing complexity is reduced while still achieving sufficient electrical connection reliability for the inspection pathway
Data Source
AI summary
An array substrate according to the present invention is an array substrate including a display region that displays an image and a frame region. The array substrate includes: a plurality of scanning lines; a plurality of signal lines; a thin film transistor disposed at an intersection of each of the plurality of scanning lines and each of the plurality of signal lines; a plurality of in-frame wires formed in the frame region; and a plurality of connection converters that electrically connect the scanning lines or the signal lines to the in-frame wires and are provided in the frame region. A single contact hole that penetrates an insulating layer is formed in each of the connection converters, and each of the scanning lines or each of the signal lines is electrically connected with each of the in-frame wires through a conductive film in the single contact hole.


