Array Substrate Interlaced Polarity Switching Frequency

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Solution Overview

Problem

Conventional LCD manufacturing techniques, particularly the data line sharing mechanism, result in high power consumption and reduced display quality due to frequent switching of signal polarities in data lines, especially at higher resolutions, which increases the RC delay and shortens charging time, necessitating a solution to lower switch frequency and reduce power consumption.

Innovation Solution

An array substrate design with interlaced scan and data lines, where each pixel region comprises two sub-pixels with different polarities, allowing the source driver to charge sub-pixel groups with either positive or negative polarity, reducing the switch frequency by extending the polarity switching period from 21.7 μs to 43.4 μs, effectively halving the switch frequency and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If data line sharing mechanism is adopted to reduce manufacturing cost, then the number of data lines is halved, but the switch frequency of drive polarity increases and power consumption increases

Engineering Contradiction:
Improvemanufacturing costVSAvoidpower consumption
Core Design Contradiction:
Ease of manufactureVSUse of energy by moving object

Solution Approach 1:

The pixel array is divided into two independent groups: first sub-pixel groups driven by first scan lines with first polarity, and second sub-pixel groups driven by second scan lines with second polarity. This segmentation allows independent driving of each group, enabling the source driver to charge one group while the other group discharges, thereby reducing the overall switch frequency and power consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements periodic charging and discharging actions where the source driver alternates between charging first sub-pixel groups and second sub-pixel groups. By coordinating the driving timing, when one group is being charged, the other group is discharging, creating a periodic action pattern that reduces the effective switch frequency from 20 kHz to approximately 10 kHz.

Inventive Principle:
Principle #19Periodic action

2Ease of manufacture

If data line sharing mechanism is adopted, then the number of data lines is halved, but the charging time of pixels becomes very short and display quality downgrades

Engineering Contradiction:
Improvemanufacturing costVSAvoiddisplay quality
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

By segmenting the pixel array into two independently driven groups with different polarities, each group can be charged with sufficient time without being constrained by the need to rapidly switch polarities for every adjacent pixel. This segmentation relaxes the charging time requirement and maintains display quality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The periodic charging and discharging scheme allows each sub-pixel group to receive adequate charging time during its designated charging period. The coordinated timing ensures that charging is completed before the next switching cycle, thereby maintaining display quality despite the reduced number of data lines.

Inventive Principle:
Principle #19Periodic action

3Measurement precision

If resolution is increased in DLS mechanism, then display quality improves, but the RC delay of signal switch increases and charging procedure is affected

Engineering Contradiction:
ImproveresolutionVSAvoidcharging procedure
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

Segmenting the high-resolution pixel array into two polarity groups allows the source driver to manage charging in larger batches without excessive polarity switching. This reduces the cumulative RC delay effect and maintains reliable charging procedure even at high resolutions.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10629145B2Array substrate for lowering switch frequency of drive polarity in data lines
Publication Date: 2020.04.21 TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
  • US10629145B2 patent drawing
  • US10629145B2 patent drawing
  • US10629145B2 patent drawing

AI summary

An array substrate for lowering switch frequency of drive polarity in data lines is described. The source driver charges a first sub-pixel group having the first polarity on pixel regions wherein the first sub-pixel group comprises a plurality of sub-pixels with the positive polarity disposed in the interlaced positions between data line and the scan lines. The source driver charges a second sub-pixel group having the second polarity on the pixel regions wherein the second sub-pixel group comprises a plurality of sub-pixels with the negative polarity disposed in the interlaced positions between data line and the scan lines. The first sub-pixel group is greater than each pixel region and the second sub-pixel group is greater than each pixel region so that either the switch frequency for driving the first sub-pixel group or the second sub-pixel group is lower than that of the two sub-pixels in the pixel region.