Array Substrate Insulating Interlayer ITO Pollution
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Solution Overview
Problem
In the manufacturing of high aperture ratio Advanced Super Dimension Switch (H-ADS) display mode array substrates, the deposition of indium tin oxide (ITO) for transparent electrodes can pollute the Thin Film Transistor (TFT) channel, and hydrogen plasma processing to reduce leakage current often results in haze mura, compromising product quality.
Innovation Solution
The method involves forming an insulating interlayer between the TFT channel and the first transparent electrode, using a double-tone mask and ash process to prevent ITO pollution, and performing hydrogen plasma processing before the passivation layer deposition to reduce leakage current without affecting the transparent electrode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ITO is deposited for transparent electrodes, then transparent electrode conductivity is improved, but TFT channel pollution occurs
Solution Approach 1:
The patent segments the manufacturing process into distinct stages by introducing an insulating interlayer that physically separates the TFT channel from the transparent electrode deposition area. This segmentation allows ITO deposition to occur without contaminating the channel region, resolving the contradiction between achieving good electrode conductivity and preventing channel pollution.
Solution Approach 2:
The insulating interlayer acts as an intermediary barrier between the TFT channel and the ITO transparent electrode. This intermediate layer prevents direct contact and pollution while still allowing the transparent electrode to function, thus maintaining conductivity without compromising channel integrity.
2Reliability
If hydrogen plasma processing is performed to reduce leakage current, then TFT leakage current is improved, but haze mura occurs compromising product quality
Solution Approach 1:
The patent performs hydrogen plasma processing on the insulating interlayer before depositing the transparent electrode. This preliminary action reduces leakage current through the insulating layer without exposing the TFT channel to plasma that would cause haze mura, thus achieving low leakage current while maintaining product quality.
Solution Approach 2:
The insulating interlayer serves as a protective intermediary during hydrogen plasma processing. It allows plasma treatment to reduce leakage current while preventing the plasma from directly contacting and damaging the TFT channel, thereby avoiding haze mura formation.
3Manufacturing precision
If double-tone mask and ash process are used to prevent ITO pollution, then manufacturing precision is improved, but process complexity increases
Solution Approach 1:
The patent uses double-tone mask technology to segment the photoresist into different exposure regions, allowing precise control over where ITO is deposited. This segmentation enables high manufacturing precision by ensuring ITO is deposited only in desired areas while preventing channel pollution, despite the increased process complexity.
Solution Approach 2:
The patent employs ash process to selectively remove photoresist in specific regions based on exposure tone differences. This parameter-based approach (using different exposure doses) achieves precise ITO deposition patterns without requiring multiple separate masking steps, balancing manufacturing precision with process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents ITO pollution of the TFT channel, maintains product quality by reducing leakage current, and avoids haze mura, ensuring the integrity of the TFT properties.
Implementation Method 1
forming a pattern including an insulating interlayer over the pattern of the source electrode, the drain electrode and the active layer
Implementation Method 2
hydrogen plasma processing to reduce leakage current often results in haze mura
Implementation Method 3
processing the photoresist in an ash process to remove a portion of the photoresist
Data Source
AI summary
An array substrate and manufacturing method thereof and display device are provided. The method of manufacturing the array substrate includes forming a pattern including a gate electrode, a gate line, a common electrode line and a gate insulating layer on a substrate; forming a pattern including a data line, a source electrode, a drain electrode and an active layer; forming a pattern including an insulating interlayer over the pattern of the source electrode, the drain electrode and the active layer; forming a pattern including a first transparent electrode over the insulating interlayer; forming a pattern including a passivation layer over the first transparent electrode; and forming a pattern including a second transparent electrode over the passivation layer. The method can efficiently prevent the ITO process polluting the TFT channel.