Array Substrate Lead Design for Etching Uniformity in OLED Displays

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Solution Overview

Problem

OLED display devices have a lower yield compared to liquid crystal display devices, particularly due to the 'transverse screen separation' defect, which is sensitive to manufacturing defects in signal lines and electronic devices on the array substrate, leading to uneven etching liquid concentration and process parameter fluctuations.

Innovation Solution

The array substrate design includes a base substrate with signal lines and IC connection lines arranged in a specific pattern, where a lead's orthographic projection guides the etching liquid between IC connection line groups, reducing uneven concentration and fluctuations in process parameters, thereby alleviating the 'transverse screen separation' defect.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple IC connection line groups are arranged adjacent to each other to connect signal lines to multiple driving ICs, then the connectivity and functionality of the array substrate are improved, but uneven etching liquid concentration occurs at the boundary between IC connection line groups, leading to process parameter fluctuations and 'transverse screen separation' defects

Engineering Contradiction:
Improveconnectivity to multiple driving ICsVSAvoidetching uniformity
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

A lead is introduced as an intermediary element between adjacent IC connection line groups. The lead's orthographic projection overlaps or connects with the orthographic projections of IC connection lines from both groups, creating a buffer zone that guides etching liquid flow and prevents concentration unevenness at the boundary between IC connection line groups.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The solution moves from a two-dimensional planar arrangement of IC connection lines to a three-dimensional configuration by introducing a lead that extends in the thickness direction. This vertical dimension allows the lead to overlap with multiple IC connection lines simultaneously, creating a spatial buffer that resolves the etching uniformity issue.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If IC connection lines are arranged in a compact pattern to improve substrate integration, then the area utilization is improved, but the etching liquid flow becomes uneven, causing concentration fluctuations and manufacturing defects

Engineering Contradiction:
Improvesubstrate area utilizationVSAvoidetching process stability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The lead serves as a mediating structure that interrupts the compact IC connection line pattern. By positioning the lead between IC connection line groups with overlapping projections, it creates controlled spacing that maintains compact overall layout while ensuring proper etching liquid flow paths and concentration distribution.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10756124B2Array substrate, manufacturing method thereof and display device
Publication Date: 2020.08.25 HEFEI XINSHENG OPTOELECTRONICS TECH CO LTD
  • US10756124B2 patent drawing
  • US10756124B2 patent drawing
  • US10756124B2 patent drawing

AI summary

An array substrate, manufacturing method thereof, and display device are disclosed. The array substrate includes signal lines; IC connection lines; the IC connection lines include at least two IC connection line groups, the at least two IC connection line groups comprise a first IC connection line group and a second IC connection line group, the array substrate further includes a lead, an orthographic projection of the lead on a straight line in a second direction is overlapped or connected with an orthographic projection of a first IC connection line in the first IC connection line group which is closest to the second IC connection line group on the straight line in a second direction and an orthographic projection of the second IC connection line in the second IC connection line group which is closest to the first IC connection line group on the straight line in a second direction respectively.