Array Substrate Layout for Backlight-Blocked TFT Leakage Reduction
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Solution Overview
Problem
The existing design of thin film transistor devices with a gate and vertical channel structure on the same horizontal plane leads to increased leakage current due to backlight interference, making it difficult to completely turn off the device.
Innovation Solution
The array substrate design includes a first gate electrode, insulating layers with through-holes, and conductive channels where the orthographic projection of the first gate electrode overlaps the conductive channel on the substrate, effectively blocking backlight and reducing leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the gate and vertical channel structure are disposed on the same horizontal plane, then the occupied area is reduced and pixel opening rate is improved, but the active layer clings to the glass substrate and is affected by backlight, causing leakage current to increase
Solution Approach 1:
The patent transitions from a planar structure to a three-dimensional stacked structure. The gate electrode and conductive channel are arranged in different vertical layers rather than on the same horizontal plane, allowing the orthographic projection of the gate to overlap the channel while maintaining spatial separation. This dimensional change enables both area reduction and backlight blocking.
Solution Approach 2:
The insulating layer serves as an intermediary between the gate electrode and the conductive channel. It provides electrical isolation while allowing the gate's orthographic projection to overlap the channel, enabling the gate to block backlight without directly contacting the channel. This mediator resolves the conflict between area reduction and leakage prevention.
2Illumination intensity
If the gate and vertical channel structure are disposed on the same horizontal plane, then the pixel opening rate is improved, but the active layer is easily affected by backlight, making it difficult to completely turn off the device
Solution Approach 1:
By arranging the gate electrode and conductive channel in different vertical layers with overlapping orthographic projections, the patent enables the gate to block backlight from reaching the active layer while maintaining a compact layout that improves pixel opening rate. The vertical stacking allows the gate to serve as an optical shield without occupying additional horizontal space.
3Area of stationary object
If the gate and vertical channel structure are disposed on the same horizontal plane, then the occupied area is reduced, but the leakage current increases sharply
Solution Approach 1:
The patent uses vertical layering to separate the gate electrode and conductive channel while maintaining overlapping projections. This three-dimensional arrangement reduces the horizontal occupied area while the vertical separation prevents direct electrical contact, thereby reducing leakage current despite the compact footprint.
Solution Approach 2:
The insulating layer acts as a mediator that prevents direct contact between the gate electrode and conductive channel. It allows the gate to be positioned such that its projection overlaps the channel for area reduction and backlight blocking, while the insulator maintains electrical isolation to prevent leakage current.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces leakage current and improves the drive current of the thin film transistor device by blocking backlight interference, enhancing the overall performance of the array substrate and display panel.
Implementation Method 1
an orthograph projection of the first gate electrode on the substrate overlaps an orthograph projection of the first conductive channel on the substrate... the first gate electrode can block backlight, so as to avoid an influence of the backlight on the first conductive channel and reduce the leakage current
Data Source
AI summary
The present application provides an array substrate and a display panel. The array substrate includes a substrate, a first gate electrode, a first insulating layer, a first electrode, a second gate electrode, a first conductive channel, and a second electrode. The present application reduces a leakage current of the array substrate by using an orthographic projection of the first gate electrode on the substrate to overlap an orthographic projection of the first conductive channel on the substrate.