Array Substrate Light Shielding Metal Layer Integration
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Solution Overview
Problem
The manufacturing of array substrates with thin film transistors made of polysilicon material requires a complex and inefficient process due to the need for multiple patterning steps, including a separate process for forming light shielding metal layers, which increases the number of patterning processes and reduces efficiency.
Innovation Solution
The light shielding metal layer and data lines are formed in the same layer on the substrate in a single step, reducing the number of patterning processes and improving manufacturing efficiency by integrating them into a single patterning process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a separate patterning process is used for forming light shielding metal layers, then the leakage current of thin film transistors is reduced, but the number of patterning processes increases and manufacturing efficiency decreases
Solution Approach 1:
The patent combines the light shielding metal layer and data line into the same conductive layer, allowing both structures to be formed in a single patterning process. This merging eliminates the need for separate patterning steps while maintaining the light shielding function that reduces leakage current, thus resolving the contradiction between reliability improvement and manufacturing efficiency.
Solution Approach 2:
The conductive layer is designed to serve multiple functions simultaneously: it acts as both the light shielding metal layer (to reduce leakage current) and the data line (for electrical connection). This multi-functionality allows a single structure to fulfill multiple roles that previously required separate processing steps, improving manufacturing efficiency without compromising leakage current reduction.
2Manufacturing precision
If multiple patterning processes are used for manufacturing array substrates with polysilicon thin film transistors, then the required functional layers are formed, but the manufacturing process becomes complex and the number of steps increases
Solution Approach 1:
The patent merges the formation of light shielding metal layers and data lines into a single patterning process by placing them in the same conductive layer. This reduces the total number of patterning steps from multiple separate processes to a unified process, simplifying the manufacturing process while maintaining the precision required for forming distinct functional layers.
Solution Approach 2:
Within the unified conductive layer, the patent uses distinct pattern regions to segment different functions: one region forms the light shielding metal layer under the active region, while another region forms the data line. This segmentation within a single layer allows complex functionality to be achieved without requiring multiple separate patterning processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process by eliminating the need for a separate patterning process for data lines and reduces the overall number of patterning steps, thereby enhancing the efficiency of array substrate production and display device manufacturing.
Implementation Method 1
the light shielding metal layer 3 shield a part of light which irradiates to an area between a drain electrode 7 and a source electrode 6
Implementation Method 2
crystallization and ion implantation are performed on the active region, thus a source electrode and a drain electrode of the thin film transistor are formed
Data Source
AI summary
An array substrate includes a substrate and data lines and scan lines arranged on the substrate. The data lines and the scan lines define plural pixel regions. A thin film transistor is arranged in each pixel region and includes a gate electrode, a source electrode, a drain electrode, and an active region. The gate electrode is arranged above the active region. The source electrode and the drain electrode are arranged at two opposite sides of the active region respectively. A light shielding metal layer is further arranged in each pixel region. The light shielding metal layer and the data lines are arranged in the same layer on the substrate. The light shielding metal layer is arranged under the active region and at least partially overlaps with the active region. The data line is close to the source electrode and does not overlap with the active region at least partially.