Array Substrate Line Exchange for IR Drop Reduction
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Solution Overview
Problem
In large-sized displays, such as LCDs and OLEDs, IR drop caused by power supply line resistance leads to current differences and mura defects, which existing methods like thickening gate metal layers or using low-resistance materials fail to adequately address without compromising film quality and increasing manufacturing complexity.
Innovation Solution
The array substrate design exchanges the scanning line and signal line positions, with the scanning line moved above the gate insulating layer, allowing for increased thickness without affecting other structural processes, and employs a bottom-gate and top-contact type thin film transistor for improved uniformity and cost-effectiveness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the gate metal layer thickness is increased to reduce resistance, then the IR drop is reduced, but the film quality and etching precision deteriorate
Solution Approach 1:
The patent changes the layering arrangement of conductive lines, moving the scanning line from the gate layer to a separate layer above the gate insulating layer. This dimensional reorganization allows the scanning line to achieve reduced resistance through increased thickness without compromising the gate metal layer quality, as the two are no longer in the same layer structure
Solution Approach 2:
The patent segments the conductive line functions by separating the scanning line from the gate layer. The scanning line is formed as a distinct layer (source and drain layer) above the gate insulating layer, while the gate layer remains separate. This segmentation allows independent optimization of each layer's thickness and properties without mutual interference
2Loss of energy
If the gate metal layer is made ultra-thick (6000Å to 9000Å) to reduce resistance, then the IR drop is reduced, but the risk of electricity leakage increases
Solution Approach 1:
The scanning line is relocated to a different dimensional layer (above the gate insulating layer) rather than thickening the gate metal layer in place. This spatial separation maintains proper electrical isolation while achieving the needed resistance reduction for the scanning line
Solution Approach 2:
The gate insulating layer serves as an intermediary barrier between the gate layer and the scanning line (source and drain layer). This intermediate insulating layer prevents electricity leakage while allowing the scanning line to be formed with sufficient thickness to reduce resistance
3Loss of energy
If copper alloy is used for the gate metal layer to reduce resistance, then the IR drop is reduced, but the etching uniformity and manufacturing cost worsen
Solution Approach 1:
The patent forms the scanning line in a separate layer above the gate insulating layer rather than using copper alloy in the gate layer. This allows the scanning line to use materials optimized for low resistance while maintaining etching uniformity in the gate layer using conventional materials like aluminum alloy
Solution Approach 2:
Different materials are used for different functional layers: the gate layer uses aluminum alloy with good etching uniformity, while the scanning line (source and drain layer) uses materials optimized for low resistance. Each layer's material is selected based on its specific functional requirements rather than using a single material for all conductive elements
Data Source
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AI summary
The present invention provides an array substrate and a manufacturing method thereof, and a display apparatus. The array substrate comprises a gate layer, a gate insulating layer, an active layer, a source and drain layer, a scanning line and a signal line formed on a substrate, the signal line is provided in a same layer as the gate layer, the scanning line is provided in a same layer as the source and drain layer, the gate insulating layer is provided between the gate layer, the signal line and the active layer. The array substrate further comprises a first through hole and a second through hole penetrating through the gate insulating layer, the signal line is connected to the source and drain layer via the first through hole, and the scanning line is connected to the gate layer via the second through hole. The present invention can increase a thickness of a power supply line without causing too much influence on formation processes of other structures, thus an influence of IR drop is suppressed.