Array Substrate Line-Turning Structure for Narrow Display Borders
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Solution Overview
Problem
Existing display devices face challenges in achieving higher yield and narrower borders due to electrostatic damage and increased space occupation when connecting signal lines and connecting lines through electrodes in the pixel electrode layer.
Innovation Solution
An array substrate design that includes a cushioning structure between the second connecting line and the gate insulating layer, where the cushioning structure extends beyond the second connecting line, allowing the third connecting line to overlap and connect with the second connecting line through a via hole, reducing border size and increasing spacing to prevent static electricity generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the half-overlapping hole method is used to connect signal lines and connecting lines through electrodes in the pixel electrode layer, then the manufacturing cost is reduced and manufacturing efficiency is improved, but electrostatic damage occurs to the electrodes resulting in lower yield
Solution Approach 1:
The patent introduces a cushioning structure (insulating layer or dummy pattern) between the signal line and the connecting line before the electrostatic discharge can occur. This cushioning structure absorbs or dissipates the electrostatic energy, preventing damage to the electrode. The cushioning structure is positioned in advance during the manufacturing process to protect against future electrostatic damage, thereby maintaining both high yield and manufacturing efficiency.
2Reliability
If the double-hole connection method is used to connect signal lines and connecting lines through electrodes in the pixel electrode layer, then electrostatic damage is avoided and yield is improved, but larger space is occupied leading to larger border
Solution Approach 1:
The patent segments the connection structure into multiple functional parts: the signal line, the cushioning structure, and the connecting line. By dividing the connection path into these segments, the design avoids the need for large overlapping areas required by the double-hole method. The cushioning structure is positioned adjacently rather than requiring extensive overlap, thus reducing the border size while maintaining protection against electrostatic damage.
3Ease of manufacture
If electrodes in the pixel electrode layer are used to bridge signal lines and connecting lines, then the number of mask plates is reduced and manufacturing cost is reduced, but electrostatic damage or larger border occurs
Solution Approach 1:
The patent introduces a cushioning structure as an intermediary element between the signal line and the connecting line. This intermediary structure serves as a protective buffer that prevents electrostatic damage while maintaining the simplified single-hole connection approach. The cushioning structure can be integrated into the existing manufacturing process without adding significant complexity, thus preserving the cost advantages while improving yield.
4Productivity
If electrodes in the pixel electrode layer are used to bridge signal lines and connecting lines, then the number of mask plates is reduced and manufacturing efficiency is improved, but larger border or electrostatic damage occurs
Solution Approach 1:
The cushioning structure is positioned in advance during the manufacturing process to protect against electrostatic damage and to define the boundary of the connection area. This beforehand cushioning allows for a more compact design with smaller border requirements, while maintaining the efficient single-hole connection method that preserves manufacturing efficiency.
Data Source
AI summary
An array substrate and a display panel are provided. In the array substrate, the cushioning structure is arranged below the second connecting line, the side of the cushioning structure close to the via hole extends beyond the second connecting line, the third connecting line overlaps with the second connecting line and a portion of the cushioning structure that extends beyond the second connecting line, and the third connecting line passes through the via hole to connect the first connecting line, so that the third connecting line can connect the first connecting line and the second connecting line to realize the line turning of the first connecting line, and a border of the array substrate is reduced compared with the double-hole connection method.