Array Substrate Local Quality for Display TFT Performance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional display devices face challenges in simultaneously meeting the requirements of high switching speed and low leakage current for peripheral TFTs and good uniformity for pixel TFTs, as they typically employ single-type TFTs, which are detrimental to the performance of low-temperature polysilicon TFTs during annealing processes.
Innovation Solution
A method for manufacturing an array substrate that forms a first thin film transistor in the pixel area using an annealing process and a second thin film transistor in the peripheral area using a dehydrogenation process, where the processes are performed simultaneously, allowing for the use of oxide semiconductor materials for pixel TFTs and low-temperature polysilicon for peripheral TFTs without adversely affecting each other's performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If single-type TFTs are employed in conventional display devices, then the manufacturing process is simplified, but it is difficult to satisfy the characteristic requirements of both pixel TFTs (low leakage current, good uniformity) and peripheral TFTs (high switching speed, high driving current) simultaneously
Solution Approach 1:
The patent applies local quality by using different semiconductor materials in different regions: oxide semiconductor material (IGZO) in the pixel area for low leakage current and good uniformity, and low-temperature polysilicon material in the peripheral area for high switching speed and driving current. This regional differentiation allows each TFT type to have optimized performance characteristics suitable for its specific function while maintaining a unified manufacturing process through simultaneous annealing and dehydrogenation treatments.
2Manufacturing precision
If annealing process is performed on oxide semiconductor layer for pixel TFTs, then good uniformity and low leakage current are achieved, but the doping effect of low-temperature polysilicon TFTs in peripheral area is adversely affected
Solution Approach 1:
The patent merges the annealing process for oxide semiconductor layer and the dehydrogenation process for low-temperature polysilicon layer into a single simultaneous treatment step. By performing both processes at the same time under optimized conditions (300-450°C for 1-12 hours), the patent achieves uniformity improvement for oxide TFTs while preserving the doping effect in peripheral TFTs, eliminating the need for separate processing steps that would complicate manufacturing.
3Speed
If low-temperature polysilicon TFTs are used for peripheral area, then high switching speed and driving current are achieved, but the uniformity and leakage current characteristics are not as good as oxide TFTs
Solution Approach 1:
The patent applies local quality by assigning different material types to different functional regions: low-temperature polysilicon in the peripheral area is optimized for high-speed switching and driving current requirements, while oxide semiconductor material in the pixel area provides superior uniformity and low leakage current. This spatial differentiation of material properties allows each region to achieve its specific performance targets without compromising the other.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the combination of advantages from both types of TFTs, improving display performance by maintaining the doping effect of low-temperature polysilicon TFTs and preventing damage to oxide TFTs during the annealing process, while being suitable for line production.
Implementation Method 1
performing an annealing process to the first semiconductor layer to form a first active layer of the first thin film transistor
Implementation Method 2
performing a dehydrogenation process to the semiconductor material layer to form a second semiconductor layer
Data Source
AI summary
An array substrate, a method for manufacturing the same, a display panel, and a display device are provided. In the method for manufacturing an array substrate provided by an embodiment of the present disclosure, the annealing process for the first active layer in the pixel area is performed by a high temperature required in the dehydrogenation process for the second active layer in the peripheral area.