Array Substrate Metal Pads for High Resolution Display Flickering

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Solution Overview

Problem

As liquid crystal display resolutions increase, the reduction in pixel size leads to decreased pixel storage capacitance due to smaller electrode areas, causing image flickering issues in high PPI or high resolution displays.

Innovation Solution

Incorporating metal pads on the array substrate that are electrically connected to both the thin film transistors and pixel electrodes, with their orthogonal projections overlapping with common electrodes, thereby increasing the effective area of pixel storage capacitors and enhancing capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If pixel size is reduced to increase display resolution, then display resolution is improved, but pixel storage capacitance decreases

Engineering Contradiction:
Improvedisplay resolutionVSAvoidpixel storage capacitance
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent introduces metal pads in a different layer dimension (lower layer) beneath the pixel electrode, transforming the storage capacitance structure from a single-layer configuration to a multi-layer configuration. This dimensional change allows the electrode area to be effectively increased without increasing the planar pixel footprint, thus maintaining high resolution while improving storage capacitance

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The metal pads are nested within the projection area of the pixel electrode, with the orthogonal projection of the metal pad overlapping with the common electrode. This nested arrangement allows the lower-layer metal pads to contribute to the storage capacitance area without interfering with the upper-layer pixel structure or increasing the overall pixel size

Inventive Principle:
Principle #7Nested doll (Nesting)

2Area of moving object

If electrode area of pixel storage capacitor is reduced to maintain pixel size, then pixel size is maintained, but storage capacitance decreases

Engineering Contradiction:
Improvepixel sizeVSAvoidstorage capacitance
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

By adding metal pads in a lower layer beneath the pixel electrode, the patent effectively increases the storage capacitance area in the vertical dimension without increasing the horizontal pixel dimensions. This allows the electrode area to be increased while maintaining the same pixel size

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent merges the pixel electrode with the lower-layer metal pads to form a combined electrode structure for the storage capacitor. The metal pads are electrically connected to the pixel electrode, and their overlapping projection with the common electrode creates an extended effective area that increases storage capacitance while maintaining compact pixel dimensions

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively increases the storage capacitance of each pixel, minimizing image flickering and improving display quality in high resolution displays by maintaining images until the next refresh cycle.

Implementation Method 1

The electric charge a storage capacitor can store is proportional to the areas of the two electrodes and inversely proportional to the distance between the two electrodes

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS9927668B2Array substrate, display panel, and display device
Publication Date: 2018.03.27 SHANGHAI TIANMA MICRO ELECTRONICS CO LTD
  • US9927668B2 patent drawing
  • US9927668B2 patent drawing
  • US9927668B2 patent drawing

AI summary

The present disclosure provides an array substrate. The array substrate includes a plurality of thin film transistors configured in an array arrangement, a plurality of common electrodes, a plurality of mutually insulated pixel electrodes coupled to the common electrodes, and a plurality of metal pads coupled to the common electrodes and configured in a layer different from the common electrodes or the pixel electrodes. The metal pads are electrically connected to drain electrodes of the thin film transistors and pixel electrodes. An orthogonal projection of a metal pad on the array substrate overlaps with at least a portion of an orthogonal projection of a corresponding common electrode on the array substrate.