Array Substrate Metal Strip Prevents Signal Line Short Circuits

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Solution Overview

Problem

The manufacturing process of low temperature poly-silicon active matrix light emitting diode (LTPS-AMOLED) display devices often results in metal residues at the bottom corners of grooves in the interlayer dielectric layer, leading to short circuits between signal lines and poor display performance due to electrical connections between these residues.

Innovation Solution

An array substrate design featuring a base substrate with a first metal layer, a first insulating layer, a second metal layer, and a second insulating layer, where the second insulating layer includes grooves overlapping signal lines, and a metal strip in the peripheral region that covers the signal lines' projection on the base substrate, preventing the etching solution from reaching the first insulating layer and reducing the likelihood of metal residue connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If grooves are formed in the interlayer dielectric layer to prevent crack spreading, then the reliability of the display device is improved, but metal residues accumulate at the bottom corners of the grooves causing short circuits between signal lines

Engineering Contradiction:
Improvecrack preventionVSAvoidmetal residue short circuit
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A metal strip is introduced as an intermediary element positioned between the signal lines and the groove bottom corners. This metal strip acts as a mediator that blocks the harmful electrical connection between metal residues and signal lines, while allowing the grooves to maintain their crack-prevention function. The metal strip is electrically connected to ground or power supply, effectively isolating the metal residues from the signal lines.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The metal strip is pre-positioned in the interlayer dielectric layer before the metal residues are formed during subsequent manufacturing processes. This preliminary arrangement creates a protective barrier that prevents the potential short circuit harm before it can occur, countering the harmful effect of metal residue accumulation in advance.

Inventive Principle:
Principle #9Preliminary anti-action

2Reliability

If the structure includes multiple metal layers and insulating layers with grooves, then the ability to isolate metal residues is improved, but the manufacturing process complexity increases

Engineering Contradiction:
Improvemetal residue isolationVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The metal strip is formed using the same metal layer process as the signal lines, integrating the isolation function into the existing manufacturing flow. By combining the metal strip formation with the standard metal layer deposition and patterning processes, the solution avoids adding separate manufacturing steps, thus reducing the increase in manufacturing complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If metal strips are added to cover signal lines in the peripheral region, then short circuits are prevented, but the device structure becomes more complex

Engineering Contradiction:
Improveshort circuit preventionVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The metal strip structure is applied locally only in the peripheral region where grooves are present and metal residue short circuits are a risk, rather than uniformly across the entire device. This localized approach provides the necessary short circuit prevention exactly where needed, while minimizing the increase in overall structural complexity in the display region.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11316000B2Array substrate including metal strip, manufacturing method thereof and display device
Publication Date: 2022.04.26 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US11316000B2 patent drawing
  • US11316000B2 patent drawing
  • US11316000B2 patent drawing

AI summary

An array substrate, a manufacturing method thereof and a display device are disclosed. The array substrate includes a base substrate; a first metal layer on the base substrate; a first insulating layer on the first metal layer; a second metal layer on the first insulating layer; and a second insulating layer located on the second metal layer. The array substrate includes a display region and a peripheral region surrounding the display region, the first metal layer includes a plurality of signal lines in the peripheral region, the second insulating layer includes at least one groove overlapping at least two signal lines, the second metal layer includes a metal strip in the peripheral region, and in the area where the groove overlaps the signal lines, an orthographical projection on the base substrate fall into the orthographic projection of the metal strip on the base substrate.