Array Substrate Motherboard Multi-Layer Routing for Cutting Waste
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Solution Overview
Problem
The existing methods for manufacturing array substrates result in material waste due to gaps between adjacent substrates during the cutting process, which can lead to incomplete circuits and damage to display circuits, and also cause sealant corrosion from moisture exposure.
Innovation Solution
The array substrate motherboard is designed with a layout that includes fan-out regions, display regions, sealant arrangement regions, and testing line regions, where testing buses and connection lines are arranged at different layers, and connection members extend across regions to ensure no gaps between adjacent substrates, with sealant positioned to prevent moisture exposure to via-holes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a large array substrate board is manufactured and then cut into multiple array substrates with blank portions between adjacent substrates, then the manufacturing process is simplified and manufacturing steps are reduced, but material waste occurs and material utilization is poor
Solution Approach 1:
The patent utilizes multi-layer routing to resolve the contradiction. By extending connection lines through multiple layers (first layer, second layer, third layer), the design eliminates the need for blank portions between adjacent array substrates on the same layer. The connection lines wrap around via-holes and transition between layers, enabling continuous electrical connection across what would otherwise be cutting boundaries, thereby achieving 100% material utilization while maintaining manufacturing simplicity.
Solution Approach 2:
The connection lines are nested within the array substrate board structure, with lines on different layers embedded within the multi-layer substrate. The via-holes provide vertical connectivity between layers, creating a nested configuration where connection paths on one layer are integrated with the overall multi-layer structure, allowing continuous routing without requiring external connections or blank margins.
2Ease of manufacture
If blank portions are left between adjacent array substrates during cutting, then cutting is easier and manufacturing is simplified, but the circuits may be incomplete and display circuits may be damaged
Solution Approach 1:
The patent resolves the reliability issue by transitioning connection lines to another dimension (different layers). When cutting lines between adjacent array substrates are encountered, the connection lines wrap around via-holes and continue on subsequent layers. This multi-layer approach ensures that cutting operations can proceed through the substrate without breaking electrical connections, as the continuity is maintained through vertical transitions between layers rather than horizontal paths that would be severed by cutting.
Solution Approach 2:
The design incorporates via-holes and multi-layer routing structures in advance to cushion against the potential harm of cutting operations. By pre-configuring vertical connection paths through via-holes and planning connection routes that transition between layers before encountering cutting lines, the design ensures that the cutting process cannot damage the electrical connections, as the critical connection paths are positioned in three-dimensional space rather than being confined to the two-dimensional cutting plane.
3Productivity
If via-holes are exposed to moisture during cutting and assembly, then the cutting and assembly processes can proceed, but the sealant may be corroded and device yield decreases
Solution Approach 1:
The patent applies preliminary protective actions by positioning the sealant to cover and protect via-holes before the cutting and assembly processes expose the substrate to moisture. The sealant is applied in advance to form a protective barrier over the via-holes and connection regions, preventing moisture from reaching and corroding these vulnerable areas during subsequent manufacturing steps. This preliminary protection ensures that productivity is maintained while reliability is preserved.
Solution Approach 2:
The sealant acts as an intermediary protective layer between the moisture environment and the via-holes/connection lines. By introducing this intermediary substance, the design prevents direct contact between moisture and the electrical connections, thereby eliminating the corrosion risk while allowing the cutting and assembly processes to proceed normally. The sealant mediates the interaction between the harmful moisture and the vulnerable electrical structures.
Data Source
AI summary
An array substrate motherboard, an array substrate, a display device and a method of manufacturing an array substrate are provided. The array substrate motherboard includes a plurality of array regions and a plurality of testing line regions. Each array region includes a fan-out region, a display region and a sealant arrangement region.