Array Substrate Connection Layout for Low-Impedance Narrow Bezels

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Solution Overview

Problem

Existing array substrates face challenges in achieving a compact design with reduced impedance and narrow frame due to increased space between signal lines and signal lead-out lines, which is disadvantageous for display panel wiring.

Innovation Solution

The array substrate design includes first and second signal lines with connection portions aligned perpendicular to their extension directions, connected via via holes, and a conductive connection layer, with engaging structures between these portions to reduce impedance and compact the wiring.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If signal lines are connected to binding region through lead-out lines in peripheral region, then signal transmission is achieved, but space between signal lines increases which is disadvantageous for compact wiring

Engineering Contradiction:
Improvespace between signal linesVSAvoidwiring layout
Core Design Contradiction:
Area of stationary objectVSEase of manufacture

Solution Approach 1:

The patent applies dimensionality change by aligning connection portions of signal lines perpendicular to their extension directions, utilizing the vertical dimension (through via holes) to achieve connection. This allows signal lines to be connected more efficiently in the peripheral region, reducing the horizontal space required between adjacent signal lines and enabling more compact wiring layouts.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If connection portions are aligned perpendicular to extension directions with via holes, then connection impedance is reduced, but manufacturing complexity increases

Engineering Contradiction:
Improveconnection impedanceVSAvoidstructure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs asymmetry in the arrangement of connection portions, where they are aligned perpendicular to the extension directions of signal lines rather than following conventional parallel arrangements. This asymmetric configuration optimizes the connection path through via holes, reducing impedance by creating more direct vertical connections while the systematic nature of the asymmetric design keeps manufacturing complexity manageable.

Inventive Principle:
Principle #4Asymmetry

3Area of stationary object

If space between signal lines is reduced for compact design, then narrow frame is achieved, but signal line interference increases

Engineering Contradiction:
Improvespace between signal linesVSAvoidsignal interference
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent applies segmentation by dividing the connection structure into distinct components: signal line extension portions, connection portions, via holes, and conductive connection layers. This segmented approach allows each component to be optimized independently - the connection portions are specifically designed and positioned to minimize interference while enabling reduced spacing between adjacent signal lines, thus achieving compact design without sacrificing signal integrity.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design reduces connection impedance and minimizes space between adjacent signal lines, facilitating a more compact wiring layout that supports a narrow frame for display panels.

Implementation Method 1

a conductive connection layer configured to connect the first signal line and the second signal line through the via holes of the first connection portion and the via holes of the second connection portion

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentEP3796077B1Array substrate, display panel, and display device
Publication Date: 2025.12.31 BOE TECHNOLOGY GROUP CO LTD
  • EP3796077B1 patent drawingFigure 1
  • EP3796077B1 patent drawingFigure 2
  • EP3796077B1 patent drawingFigure 3

AI summary

Embodiments disclosed in the present invention provide an array substrate, a display panel, and a display device. The array substrate comprises: a first signal line, the first signal line comprising a first extension portion along a first direction and a first connection portion along a second direction, and the first connection portion being provided with a via hole; a second signal line, the second signal line comprising a second extension portion and a second connection portion along the second direction, and the second connection portion being provided with the via hole; and a conductive connection layer, configured to connect the first signal line and the second signal line by means of the via hole of the first connection portion and the via hole of the second connection portion. The first connection portion and the second connection portion are lined up in a direction perpendicular to the second direction.