Array Substrate Non-Overlapping Lines Eliminate Parasitic Capacitance
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Solution Overview
Problem
In traditional Fringe Field Switching (FFS) and Advanced super Dimension Switch (ADS) mode display technologies, the overlap between common electrode lines and data lines generates parasitic capacitance, leading to a greenish picture phenomenon that worsens with larger panel sizes, compromising display quality.
Innovation Solution
The design of an array substrate where common electrode lines and data lines do not overlap, with each pixel unit comprising a pixel electrode, a first thin film transistor (TFT), and a common electrode, and optionally a second TFT, with the common electrode line parallel to the data line, and an insulating layer between them to prevent parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the common electrode line and data line are deposited using the same material and overlap with each other, then the manufacturing process is simplified, but parasitic capacitance is generated between the data line and common electrode line
Solution Approach 1:
The patent extracts the harmful overlap between common electrode line and data line by introducing an insulating layer between them. This allows the lines to be deposited simultaneously using the same material while preventing parasitic capacitance formation, thus resolving the contradiction between manufacturing simplicity and harmful electromagnetic interference.
Solution Approach 2:
An insulating layer is introduced as an intermediary between the common electrode line and data line. This intermediary prevents direct electrical interaction and parasitic capacitance formation while allowing both lines to coexist in the same manufacturing process, resolving the contradiction between ease of manufacture and harmful electromagnetic effects.
2Area of stationary object
If the common electrode line overlaps with the data line, then the layout density is increased, but greenish picture phenomenon occurs due to parasitic capacitance
Solution Approach 1:
The patent removes the harmful effect of parasitic capacitance by extracting the direct overlap between common electrode line and data line through the introduction of an insulating layer. This allows high layout density to be maintained while eliminating the greenish picture phenomenon that occurs due to parasitic capacitance interference.
Solution Approach 2:
An insulating layer serves as an intermediary that allows the common electrode line and data line to be positioned in close proximity for high layout density while preventing the formation of parasitic capacitance. This intermediary eliminates the greenish picture phenomenon while maintaining efficient space utilization.
3Area of stationary object
If the panel size is increased, then the display area is enlarged, but the greenish picture problem worsens due to increased parasitic capacitance
Solution Approach 1:
The patent extracts the source of parasitic capacitance by preventing overlap between common electrode line and data line through the insulating layer. This solution effectively eliminates the greenish picture problem even as panel size increases, allowing display area to be enlarged without worsening the display quality issue.
Data Source
AI summary
The present invention discloses an array substrate comprising a plurality of common electrode lines, a plurality of gate lines, and a plurality of data lines formed on a substrate, and a plurality of pixel units formed among the gate lines, the data lines and the common electrode lines, each pixel unit comprises: a pixel electrode, a first TFT, and a common electrode, the gate line and the data line drive the pixel electrode through the first TFT, the common electrode line is connected to the common electrode, the common electrode line and the data line do not overlap with each other, and an insulating layer is disposed between the common electrode line and the date line. The present invention further discloses a fabrication method of the array substrate and a display device comprising the array substrate.