Array Substrate with Segmented Ohmic Contact for LCD
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Solution Overview
Problem
The existing array substrates for liquid crystal display (LCD) devices face issues with photo leakage current due to the high thickness of the active layer, which degrades the thin-film transistor (TFT) properties and image quality, and increases production time and costs.
Innovation Solution
The array substrate design features an active layer and ohmic contact layer of intrinsic and impurity-doped amorphous silicon with reduced thickness, where the ohmic contact layer covers the active layer between the source and drain electrodes, allowing efficient electron flow control and improved TFT driving properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the active layer thickness is increased to ensure proper coverage, then the TFT switching capability is improved, but photo leakage current increases and image quality degrades
Solution Approach 1:
The semiconductor layer is divided into two distinct segments: an intrinsic amorphous silicon active layer and an impurity-doped amorphous silicon ohmic contact layer. This segmentation allows the active layer to be kept thin (reducing photo leakage) while the separate ohmic contact layer provides the necessary electrical contact without requiring the active layer to be thick for coverage purposes.
Solution Approach 2:
Different regions of the semiconductor layer have different properties: the active layer region maintains intrinsic properties for proper switching control, while the ohmic contact layer region has doped properties for low-resistance electrical contact. This local differentiation of material properties resolves the contradiction between thin active layer and proper coverage.
2Manufacturing precision
If the active layer thickness is increased to simplify fabrication, then manufacturing precision is improved, but production time and costs increase
Solution Approach 1:
By segmenting the semiconductor layer formation into sequential deposition of intrinsic and doped layers, the fabrication process achieves high precision without requiring complex thick-layer etching steps. The sequential deposition approach simplifies the overall manufacturing process while maintaining precision.
Solution Approach 2:
The ohmic contact layer is formed preliminarily through impurity doping before final device assembly. This preliminary action of doping creates the necessary electrical properties in advance, eliminating the need for subsequent complex etching and processing steps that would increase production time.
3Object-generated harmful factors
If the active layer is made thinner to reduce photo leakage, then image quality is improved, but TFT driving properties deteriorate
Solution Approach 1:
The impurity-doped ohmic contact layer acts as an intermediary between the thin intrinsic active layer and the source/drain electrodes. This intermediary layer provides the necessary electrical contact and driving properties without requiring the active layer itself to be thick, thus maintaining both low photo leakage and proper TFT driving characteristics.
Solution Approach 2:
The thin active layer maintains intrinsic properties for low photo leakage, while the locally added doped ohmic contact layer provides the necessary electrical conductivity for proper TFT driving. This local quality differentiation resolves the contradiction between thin layer and proper device performance.
Data Source
AI summary
A method of fabricating an array substrate for a liquid crystal display device can include forming a gate line and a gate electrode, and a gate insulating layer; forming an active layer on the gate insulating layer and an ohmic contact layer on the active layer; forming a data line and source and drain electrodes; forming a passivation layer on the source and drain electrodes; and forming a pixel electrode on the passivation layer, in which the ohmic contact layer covers an entire top surface of the active layer between the source and drain electrodes; forming a metallic layer on the gate insulating layer and the ohmic contact layer; etching the metallic layer to faun the data line, and the source drain electrodes, in which a silicide layer is formed on the ohmic contact layer only in the space between the source and drain electrodes; and removing the silicide layer.