Array Substrate Layout With Compensation TFTs for OLED Flicker
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Solution Overview
Problem
Existing OLED display devices face issues with flicker due to the hysteresis effect of thin film transistors, which affects display quality and stability.
Innovation Solution
The array substrate design includes a specific arrangement of pixel driving circuits and transistors, with non-overlapping orthographic projections of signal lines and conductive connections to minimize overlap and enhance transistor stability, incorporating compensation transistors to stabilize node voltages and reduce hysteresis effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the scanning signal line and conductive connection portion are arranged with overlapping projections, then the device complexity is reduced, but the hysteresis effect of thin film transistors causes flicker and affects display quality
Solution Approach 1:
The patent resolves the layout conflict by transitioning from a two-dimensional planar arrangement to a three-dimensional stacked architecture. The scanning signal line and conductive connection portion are positioned in different vertical layers, allowing their projections to overlap in the planar view while physically being separated in the vertical dimension. This layered structure eliminates the harmful electrical interaction that causes flicker while maintaining layout compactness.
Solution Approach 2:
The patent divides the display device into multiple vertical layers, separating the scanning signal line and conductive connection portion into distinct structural segments. This segmentation allows each component to be optimized independently for its function while avoiding interference, as they occupy different spatial zones in the vertical direction despite overlapping in the horizontal projection.
2Adaptability or versatility
If thin film transistors are used in pixel driving circuits, then the display device achieves flexibility and compactness, but the hysteresis effect of thin film transistors causes flicker
Solution Approach 1:
The patent introduces a compensation transistor that forms a feedback loop to detect and correct the hysteresis effect in real-time. The compensation transistor adjusts the voltage at the gate of the thin film transistor to counteract the hysteresis-induced voltage shifts, thereby eliminating flicker while preserving the flexibility advantages of thin film transistor technology.
Solution Approach 2:
The compensation transistor acts as an intermediary element between the scanning signal line and the pixel driving circuit. It mediates the electrical signals to compensate for hysteresis effects, allowing the thin film transistor to maintain its flexibility benefits while achieving stable display performance through the mediating action of the compensation transistor.
3Area of stationary object
If the control electrode of the driving transistor is electrically connected to the first conductive connection portion, then the pixel driving circuit achieves compact layout, but overlapping projections cause electrical interference and affect transistor stability
Solution Approach 1:
The patent applies vertical layering to separate the control electrode and first conductive connection portion into different vertical levels. Their horizontal projections overlap to achieve compact pixel area, but their vertical separation prevents electrical interference and maintains transistor stability by eliminating capacitive coupling and signal interference that would occur in a planar arrangement.
Data Source
AI summary
An array substrate includes a substrate, pixel driving circuits and first scanning signal lines. Any pixel driving circuit includes a driving transistor, a compensation transistor and a first conductive connection portion. The first scanning signal lines extending in the first direction and arranged in the second direction. A control electrode of the driving transistor is electrically connected to the first conductive connection portion, a control electrode of the compensation transistor is electrically connected to a first scanning signal line, a second electrode of the compensation transistor is electrically connected to the first conductive connection portion, and a first electrode of the compensation transistor electrically connected to a second electrode of the driving transistor. An orthographic projection of the first scanning signal line on the substate is non-overlapping with an orthographic projection of the first conductive connection portion on the substrate.