Array Substrate Fanout Layout With Overlapping Lines for Narrow Bezel
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing display panel designs face challenges in reducing the lower frame width due to the significant area occupied by the fanout region, necessitating a reduction in pitch between fanout lines to increase the screen-to-body ratio.
Innovation Solution
An array substrate design with overlapping first and second fanout lines separated by insulating spacer layers, utilizing a light shielding layer in the same layer as the second fanout line to increase interlayer space and reduce capacitance, thereby allowing for a narrower frame.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the pitch between fanout lines is reduced to decrease the length of fanout region, then the area of fanout region is reduced, but the capacitance between fanout lines increases causing increased crosstalk and power consumption
Solution Approach 1:
The patent transitions from a planar arrangement of fanout lines to a three-dimensional stacked arrangement with multiple layers. First and second fanout lines are positioned in different layers with their orthographic projections overlapping, utilizing the vertical dimension to reduce in-plane pitch while maintaining electrical isolation through insulating spacer layers between layers.
Solution Approach 2:
Insulating spacer layers are introduced as intermediary structures between the first and second fanout lines. These spacers physically separate the conductive lines in the vertical dimension, preventing direct electrical interaction and reducing capacitance-induced crosstalk while allowing the lines to occupy overlapping horizontal space.
2Device complexity
If multiple fanout lines are arranged in the same layer, then the layout is simpler, but the pitch between lines must be large to avoid crosstalk
Solution Approach 1:
The patent resolves the conflict between layout simplicity and pitch requirements by moving fanout lines from a single-layer planar arrangement to a multi-layer vertical arrangement. This allows lines to be positioned in different vertical layers with overlapping horizontal projections, effectively utilizing the Z-dimension to reduce in-plane pitch while maintaining electrical isolation.
3Length of stationary object
If the fanout region length in Y direction is reduced to narrow the lower frame, then the screen-to-body ratio increases, but the capacitance between closely spaced lines increases
Solution Approach 1:
The patent enables reduction of fanout region length in the Y direction by implementing overlapping fanout lines in different vertical layers. This three-dimensional arrangement allows the horizontal projection of lines to overlap, effectively shortening the required length of the fanout region while maintaining acceptable capacitance levels through vertical separation via insulating spacers.
Data Source
Figure 1~2
Figure 3~4
Figure 5A~5B
AI summary
An array substrate includes: a base substrate (40); and a display region (10) in which a signal line is provided and a fanout region (20) provided on the base substrate, the fanout region (20) including a first fanout line layer in which a first fanout line (41a) is provided, a second fanout line layer in which a second fanout line (42a) is provided, and one or more spacer layers (55) between the first fanout line layer and the second fanout line layer; the signal line is connected to the first fanout line (41a) or the second fanout line (42a); and the spacer layers (55) are made of an insulating material; wherein an orthographic projection of the first fanout line (41a) on the base substrate (40) and an orthographic projection of the second fanout line (42a) on the base substrate (40) are at least partially overlapped with each other. A method of manufacturing an array substrate and a display device are also provided.