Array Substrate Pad Layout for Narrow-Bezel Signal Routing
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Solution Overview
Problem
Existing array substrates face challenges in minimizing the non-display area, particularly around the chip integration region, to achieve a narrower frame design while ensuring efficient circuit layout and signal transmission.
Innovation Solution
The array substrate incorporates a substrate with a display region and a non-display region, featuring a first pad group in the chip integration region and at least one second pad group in the non-display region. Connecting lines electrically connect the second pads to the first pads, with increasing lengths away from the first pad group, allowing for efficient signal transmission and reduced area occupation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the non-display area is reduced to achieve narrow frame design, then the frame width is reduced, but the circuit layout complexity increases
Solution Approach 1:
The pad groups are segmented into multiple categories (first pad group in chip integration region, second pad group in non-display region, third pad group in display region) with different functions. This segmentation allows independent optimization of each pad group's location and connection, reducing overall circuit layout complexity while maintaining narrow frame design
Solution Approach 2:
The patent utilizes multi-layer conductor structures and three-dimensional spatial arrangement of pad groups and connecting lines. By distributing pads across different regions and layers, the design reduces planar complexity while achieving compact frame dimensions
2Reliability
If the connecting lines are arranged with increasing lengths away from the first pad group, then the signal transmission optimization is improved, but the area occupation increases
Solution Approach 1:
Different connecting lines have different lengths optimized for their specific signal transmission requirements. Lines connecting to AC signal pads have different characteristics than those for DC signal pads, allowing local optimization of each connection path while maintaining overall area efficiency
Solution Approach 2:
The connecting lines are designed with variable lengths that dynamically adapt to different signal types and transmission distances. The gradient length arrangement allows shorter paths for critical signals and longer paths for less time-sensitive signals, optimizing transmission reliability without maximizing area occupation
3Area of stationary object
If the chip integration region area is reduced, then the non-display area is minimized, but the circuit layout near the chip integration area becomes more complex
Solution Approach 1:
The first pad group is integrated within the chip integration region, merging the pad function with the chip mounting area. This consolidation eliminates the need for separate pad regions, reducing non-display area while the multi-group pad structure maintains circuit layout manageability
Solution Approach 2:
The second pad group acts as an intermediary between the first pad group (in chip integration region) and external connections. This intermediate structure simplifies the circuit layout by providing a buffer zone for signal routing and reducing direct complexity at the chip integration area
Data Source
AI summary
An array substrate, a display panel and a display module. The array substrate includes a substrate including a non-display area. The non-display area includes a chip integration area. A first pad group is arranged in the chip integration area, the first pad group includes a plurality of first pads. A second pad group is arranged in the non-display area, each second pad group includes a plurality of second pads. A plurality of connecting lines are configured to electrically connect the second pads with the first pads. Lengths of the connecting lines are respectively electrically connected to the plurality of second pads in each second pad group arranged along a direction away from the first pad group increase.