Array Substrate Capacitor Layout for Stable High-PPI Pixel Voltage
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Solution Overview
Problem
High-PPI and high-definition display screens face challenges in maintaining stable pixel voltage due to reduced storage capacitance, affecting display quality.
Innovation Solution
An array substrate design that incorporates a compensation capacitor, including a first electrode in contact with the active layer's surface and side, and a light shielding layer forming a storage capacitor, along with via holes and grooves to increase capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the pixel size is reduced to increase PPI, then the display resolution is improved, but the storage capacitance decreases causing unstable pixel voltage
Solution Approach 1:
The patent extends the first electrode not only horizontally but also vertically by forming it to contact both the surface and side surface of the active layer. This three-dimensional electrode configuration increases the overlap area with the common electrode, thereby increasing the storage capacitance without increasing the pixel's planar footprint, allowing high PPI to be maintained while improving voltage stability.
Solution Approach 2:
The first electrode is nested within the via hole structure, extending into the groove formed in the insulating layer. This nested configuration allows the electrode to utilize the vertical space within the pixel structure, increasing the capacitance-forming overlap area between electrodes without occupying additional lateral space that would reduce pixel density.
2Reliability
If the first electrode contacts both surface and side surface of active layer, then the storage capacitance is increased, but the manufacturing complexity increases
Solution Approach 1:
The via hole structure is segmented into two parts: a through hole penetrating the second insulating layer and a groove formed in the first insulating layer. This segmentation allows the first electrode to be formed in a staged manner, first filling the through hole and then extending into the groove, making the complex three-dimensional electrode structure manufacturable through sequential processing steps.
Solution Approach 2:
The groove is pre-formed in the first insulating layer before the first electrode is deposited. This preliminary action creates a prepared pathway that guides the electrode formation process, allowing the electrode to automatically extend into the groove and contact the side surface of the active layer without requiring additional complex alignment or positioning steps during electrode deposition.
3Reliability
If via holes penetrate multiple insulating layers, then the electrode connection is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The groove in the first insulating layer acts as a cushioning feature that accommodates variations in via hole positioning. By providing this pre-formed recess, the structure tolerates certain alignment tolerances in the through hole formation process, reducing the stringent precision requirements for penetrating multiple insulating layers while still achieving reliable electrode contact.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design stabilizes pixel voltage by enhancing storage capacitance, improving display quality in high-PPI and high-definition displays.
Implementation Method 1
the first electrode and the light shielding layer form a compensation capacitor
Data Source
AI summary
Provided are an array substrate and a display apparatus. The array substrate comprises: a base substrate, which comprises a main surface; a transistor, which is located on the main surface of the base substrate, and comprises an active layer and a first electrode connected to the active layer; a first insulating layer, which is located between the base substrate and the active layer; a second insulating layer, which is located between the active layer and the first electrode; a pixel electrode, which is connected to the first electrode; and a common electrode, wherein the common electrode and the pixel electrode are insulated from each other, the pixel electrode and the common electrode are configured to form an electric field, and the first electrode is in contact with the surface of the active layer that faces away from the base substrate, and is in contact with a side face of the active layer. The array substrate and the display apparatus facilitate an increase in the contact area of a first electrode and a side face of an active layer, and facilitate an increase in the capacitance of a storage capacitor formed by means of the first electrode and another electrode, thereby solving the problem of a pixel voltage being kept unstable due to a reduction in the storage capacitor that is caused by a reduction in the pixel area.