Array Substrate Protective Holes for Electrostatic Discharge Control
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Solution Overview
Problem
In Advanced Super Dimension Switch (ADS) mode display devices, static electricity generated during the manufacturing process of array substrates can lead to electrostatic discharge, causing abnormality and breakdown of source and drain holes, resulting in short circuits between the gate and source/drain, which affects product quality and yield.
Innovation Solution
The introduction of a protective layer and protective holes in the etch stop layer, where the protective holes are smaller in diameter and closer to connecting holes than source and drain holes, allowing static charges to discharge through the protective holes instead, thereby preventing breakdown of source and drain holes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If source holes and drain holes are formed in the etch stop layer to allow electrostatic discharge, then static electricity can be released, but the source holes and drain holes may be broken down causing short circuits between gate and source/drain
Solution Approach 1:
The patent divides the electrostatic discharge path by introducing protective holes separate from source and drain holes. The etch stop layer is segmented to include multiple types of holes: source holes for source connection, drain holes for drain connection, and protective holes specifically for electrostatic discharge. This segmentation ensures that electrostatic discharge does not occur through the source or drain holes, preventing short circuits while still allowing static electricity release.
Solution Approach 2:
The patent introduces protective holes as an intermediary structure between the etch stop layer and the underlying layers. These protective holes serve as a dedicated pathway for electrostatic discharge, acting as a mediator that redirects the discharge away from critical source and drain holes. The protective holes are positioned and sized to provide this intermediary function without interfering with the normal operation of source and drain holes.
2Reliability
If the diameter of protective holes is smaller than source and drain holes, then electrostatic discharge is directed away from source and drain holes, but the protective holes must be precisely positioned closer to connecting holes
Solution Approach 1:
The patent applies local quality by making protective holes smaller in diameter than source and drain holes. This size differentiation creates a local property distinction that guides electrostatic discharge preferentially through the protective holes. The smaller diameter of protective holes is a localized characteristic that helps redirect the discharge path away from source and drain holes, while the positioning closer to connecting holes is another local property that ensures proper discharge routing.
3Reliability
If protective holes are introduced in the etch stop layer, then electrostatic discharge is controlled, but the device structure becomes more complex
Solution Approach 1:
The patent applies universality by making the etch stop layer serve multiple functions: it provides mechanical support, defines the discharge path through protective holes, and maintains the structural integrity of the device. The protective holes themselves serve multiple purposes: they provide electrostatic discharge pathways, act as structural elements, and help define the spatial relationships between different layers. This multi-functionality reduces the need for additional separate structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively prevents short circuits between the gate and source/drain, enhancing the reliability of the array substrate and display device by directing electrostatic discharge away from critical source and drain holes, thus maintaining product quality and increasing yield.
Implementation Method 1
static electricity is generated on the substrate 10, that is, a large amount of electrostatic charges accumulate on the surface of the substrate 10. Under certain circumstance, a large amount of static electricity will be released, thus resulting in damage to some structure(s) on the array substrate 1.
Data Source
AI summary
The invention discloses array substrate, manufacturing method thereof, display panel and display device, array substrate comprises TFTs, common electrodes, common electrode lines, data lines and gate lines, each TFT comprises gate, active layer corresponding to the gate, protective layer corresponding to the gate line or gate, and ESL, the active layer and protective layer are provided in the same layer and separated from each other; the ESL is provided with source holes and drain hole corresponding to the active layer, protective hole corresponding to the protective layer but not overlapping with the data line, and connecting holes corresponding to the common electrode and common electrode line; and distance between each connecting hole and the protective hole closest thereto is smaller than that between the connecting hole and the source or drain hole closest thereto, and/or, diameter of said protective hole is smaller than those of the source and drain holes.