Array Substrate Reset Signal Line Integration for High PPI
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Solution Overview
Problem
The existing pixel circuit structures in display technologies, such as OLED and quantum dots, face limitations in improving pixel density due to the arrangement of multiple TFTs and exposure accuracy of existing exposure machines, leading to a waste of space and limited PPI in a limited layout space.
Innovation Solution
An array substrate design that includes sub-pixel units with a pixel circuit structure comprising a driving transistor, a first reset transistor, and a second reset transistor, where the active structure of the first reset transistor is electrically coupled to the anode of a light-emitting element and the active structure of the second reset transistor, and the first metal layer structure of the driving transistor is coupled to the second reset transistor, reducing the need for separate TFTs and reset signal lines, thereby saving layout space and improving PPI.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate TFTs and reset signal lines are provided for each pixel unit, then the pixel circuit structure is complete and functional, but the layout space is wasted and PPI is limited
Solution Approach 1:
The patent merges the reset signal line function into the source-drain electrode structure. The source-drain electrode serves dual purposes: as the drain electrode for the driving transistor and as the reset signal line for the light-emitting element. This eliminates the need for separate reset signal lines, reducing layout space while maintaining complete pixel circuit functionality.
Solution Approach 2:
The source-drain electrode is designed to perform multiple functions simultaneously: it acts as the drain electrode for the driving transistor, provides reset signal transmission to the light-emitting element, and serves as an electrical connection path. This multi-functionality reduces the number of separate components needed in the pixel circuit.
2Reliability
If multiple TFTs are arranged in each pixel unit, then the pixel circuit can perform driving and reset functions, but the pixel density cannot be improved due to space constraints
Solution Approach 1:
The patent combines the reset transistor's source-drain electrode with the driving transistor's source-drain electrode structure. The shared source-drain electrode structure allows both driving and reset functions to be performed while occupying less space, thereby enabling higher pixel density without sacrificing circuit functionality.
Solution Approach 2:
The patent utilizes vertical stacking of metal layer structures to achieve electrical connections that would otherwise require horizontal space. By using multiple metal layers (first metal layer structure, second metal layer structure, third metal layer structure) with via holes for vertical connections, the design reduces the horizontal footprint of the pixel circuit, enabling higher pixel density.
3Reliability
If separate reset signal lines are provided for each pixel unit, then the reset function is reliable, but the number of via holes increases and layout space is consumed
Solution Approach 1:
The patent merges the reset signal line function into the existing source-drain electrode structure, eliminating the need for separate reset signal lines. This reduces the number of via holes required for electrical connections while maintaining reliable reset function through the shared source-drain electrode structure.
Data Source
AI summary
Provided are an array substrate, a display panel and a display device. The array substrate includes multiple sub-pixel units arranged in an array. Each sub-pixel unit includes a pixel circuit structure and a light-emitting element; the pixel circuit structure includes a driving transistor, a first reset transistor and a second reset transistor; each of the driving transistor, the first reset transistor and the second reset transistor includes an active structure, a first insulating structure on the active structure, and a first metal layer structure on the first insulating structure; the active structure of the first reset transistor of an i-th row of sub-pixel unit is electrically coupled to an anode of the light-emitting element of the i-th row of sub-pixel unit, and is electrically coupled to the active structure of the second reset transistor of an (i+1)-th row of sub-pixel unit, i being an integer greater than 0.