Array Substrate Layout for Shallow-Via Optical Fingerprint Sensing

The patent divides the connection structure into multiple segments: upper conductive layer, intermediate conductive layers (second and third conductive layers), and lower metal part, connected through multiple vias (first via, second via, third via). This segmentation reduces the depth of each individual via while maintaining the overall connection, thereby reducing process risk in exposure and etching.

The patent introduces intermediate conductive layers and additional vias to create a multi-dimensional connection path. Instead of a direct deep via connection, the structure uses multiple layers and intermediate connection points to achieve the same electrical connection through an extended dimensional path, reducing the depth burden on any single via.

The etching process is segmented into multiple stages corresponding to forming first via, second via, and third via at different depth levels. Each etching stage operates on a shallower depth with better process control, avoiding the need for a single deep etch that would compromise stability.

The patent employs preliminary protective measures by introducing intermediate conductive layers and insulating layers that protect the optical sensor structure during subsequent etching processes. The multi-layer structure provides mechanical support and process protection during manufacturing.

The electrical connection is achieved through multiple shallow vias (first via, second via, third via) rather than a single deep via. Each via is easier to manufacture with standard exposure and etching processes, while the series connection of multiple vias maintains electrical connectivity.

Intermediate conductive layers (second conductive layer, third conductive layer) serve as mediators between the upper conductive layer and lower metal part. These intermediate layers provide connection points that reduce the depth requirement for individual vias, making the overall structure easier to manufacture.