Array Substrate Shielding Lines for Reduced Parasitic Capacitance
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Solution Overview
Problem
In liquid crystal display panels with fringe field switching mode, large lateral parasitic capacitance between data lines and pixel electrodes leads to signal crosstalk and degradation of display quality.
Innovation Solution
The array substrate design includes data lines with first segments positioned between adjacent pixel electrodes, ensuring non-overlapping orthographic projections with both pixel and common electrode layers, and incorporates shielding lines to form a shielding electric field around data lines, reducing parasitic capacitance and signal delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If data lines are arranged close to pixel electrodes to reduce spacing, then device density is improved, but parasitic capacitance between data lines and pixel electrodes increases
Solution Approach 1:
A shielding line is introduced as an intermediary element between the data line and the pixel electrode. The shielding line, which is electrically connected to the common electrode, acts as a mediator that blocks the direct capacitive coupling between the data line and pixel electrode, thereby reducing parasitic capacitance while allowing the data line to be positioned close to the pixel electrode for high device density
Solution Approach 2:
The shielding line utilizes the common electrode potential to create a protective electric field that converts the potentially harmful close proximity between data lines and pixel electrodes into a beneficial configuration. By positioning the shielding line at the same potential as the common electrode, the system transforms the spatial constraint into an opportunity for reduced parasitic capacitance through proper electrostatic field management
2Speed
If data lines are positioned close to pixel electrodes, then charging rate is improved, but signal crosstalk increases
Solution Approach 1:
The shielding line serves as an intermediary that enables close positioning of data lines to pixel electrodes for fast charging while preventing signal crosstalk. The shielding line, connected to the common electrode, creates an electrostatic barrier that isolates the data line signal from the pixel electrode, allowing high charging rates without compromising signal integrity
Solution Approach 2:
The system converts the potentially harmful effect of close spacing (which causes both fast charging and crosstalk) into a beneficial configuration by introducing the shielding line. The shielding line allows the data line to be positioned close to the pixel electrode for rapid charging while the electrostatic field generated by the shielding line prevents signal crosstalk
3Illumination intensity
If fringe field switching is used to achieve high light transmittance, then display quality is improved, but lateral parasitic capacitance increases
Solution Approach 1:
The shielding line acts as an intermediary element that preserves the fringe field switching mechanism for high light transmittance while simultaneously reducing lateral parasitic capacitance. By positioning the shielding line between the data line and pixel electrode, the electrostatic field required for fringe field switching is maintained without creating excessive parasitic capacitance
Solution Approach 2:
The shielding line introduces local quality changes in the electrostatic field distribution. By positioning the shielding line specifically between the data line and pixel electrode, the system creates a localized field modification that reduces parasitic capacitance in the critical region while maintaining the overall fringe field switching functionality for high light transmittance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces parasitic capacitance, minimizes signal delays, enhances charging rates, and improves display quality by preventing signal crosstalk and light leakage.
Implementation Method 1
incorporates shielding lines to form a shielding electric field around data lines, reducing parasitic capacitance and signal delays
Data Source
AI summary
An array substrate including a substrate, a source-drain layer, a pixel electrode layer, and a common electrode layer in a stacked configuration. The source-drain layer includes a plurality of data lines. The pixel electrode layer is disposed at a side of the source-drain layer away from the substrate. The pixel electrode layer includes a plurality of pixel electrodes. The common electrode layer is disposed at a side of the pixel electrode layer away from the substrate. The common electrode layer includes a plurality of common electrodes. By setting each data line to include a first data segment disposed between two adjacent pixel electrodes, the orthographic projection of the first data segment on the substrate is not overlapped with that of the pixel electrode layer on the substrate or with that of the common electrode layer on the substrate.