Array Substrate Shielding Structure for Crosstalk Reduction

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Solution Overview

Problem

In OLED display screens, parasitic capacitance between the data signal line and the gate of the driving transistor leads to crosstalk, causing deviations in gate voltage and affecting pixel brightness, resulting in vertical crosstalk phenomena.

Innovation Solution

An array substrate with a shielding structure between the conductive wire and the gate, where the shielding structure is thicker than the insulating layer, is used to reduce parasitic capacitance and crosstalk, comprising a manufacturing method that forms a gate, insulating layer, and conductive wire with the shielding structure to mitigate the electric field influence.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional insulating layer is used between the conductive wire and gate, then the structure is simple and easy to manufacture, but parasitic capacitance causes crosstalk and gate voltage deviation

Engineering Contradiction:
Improvesignal integrityVSAvoidshielding structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A shielding structure is introduced as an intermediary component between the conductive wire and the gate. This shielding structure includes a shielding electrode and insulating layers, acting as a mediator to block the electric field coupling between the data signal line and gate, thereby reducing parasitic capacitance and crosstalk while maintaining signal integrity

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The shielding structure extends in the vertical dimension (thickness direction) beyond the conventional insulating layer thickness. By increasing the thickness of the shielding structure to 2-5 times that of the insulating layer, the patent creates additional shielding space in the vertical dimension to effectively reduce parasitic capacitance without increasing horizontal footprint

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the shielding structure thickness is increased to reduce parasitic capacitance, then crosstalk is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvecrosstalk reductionVSAvoidshielding structure thickness control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The shielding structure is formed using the same insulating material layer as the first insulating layer, merging the shielding function with the existing insulating layer formation process. This integration reduces the number of separate manufacturing steps and simplifies thickness control, as both the insulating layer and shielding structure can be formed in the same deposition or spin-coating process

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent specifies that the shielding structure thickness should be 2 to 5 times that of the insulating layer, providing a flexible parameter range rather than a fixed value. This parameter change approach allows manufacturers to achieve effective crosstalk reduction while accommodating variations in manufacturing processes and material properties

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The shielding structure effectively reduces crosstalk and improves display performance by increasing the equivalent pitch of parasitic capacitance, thereby stabilizing the gate voltage and minimizing brightness deviations across pixels.

Implementation Method 1

the shielding structure is used to at least partially shield a crosstalk of the conductive wire to the gate

Methodology Applied
Scientific EffectElectrostatic shielding: Faraday Cage

Data Source

PatentUS11282910B2Array substrate, manufacturing method thereof, and display device
Publication Date: 2022.03.22 BOE TECHNOLOGY GROUP CO LTD
  • US11282910B2 patent drawing
  • US11282910B2 patent drawing
  • US11282910B2 patent drawing

AI summary

The present disclosure provides an array substrate, a manufacturing method thereof, and a display device. The array substrate includes: a base substrate, a gate on the base substrate, a conductive wire above the base substrate, a first insulating layer on the gate and the base substrate, and a shielding structure on the base substrate. A first orthographic projection of the conductive wire on the base substrate is spaced apart from a second orthographic projection of the gate on the base substrate. A third orthographic projection of the shielding structure on the base substrate is located between the first orthographic projection and the second orthographic projection. The shielding structure is used to at least partially shield a crosstalk of the conductive wire to the gate.