Array Substrate Signal Line Thickness Optimization for IR Drop Reduction
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Solution Overview
Problem
High-PPI display devices face challenges with voltage drops due to resistance in wiring, which affect signal transmission and image quality, particularly in high-resolution displays like 8K resolution devices.
Innovation Solution
The array substrate design includes signal lines with increased thickness, specifically copper-based metal lines that are at least 1.5 times thicker than the gate or source/drain electrodes of the thin film transistor, along with a light shielding layer and conductive plugs to reduce resistance and IR Drop, while maintaining the structure's thickness and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If signal line thickness is increased to reduce resistance and IR Drop, then electrical conductivity is improved, but device structure complexity increases
Solution Approach 1:
The patent applies different thickness specifications to different signal line types: first signal lines (gate lines) have thickness greater than the gate electrode, while second signal lines (data lines) have thickness greater than the source/drain electrodes. This localized differentiation optimizes electrical conductivity where needed while managing overall device complexity.
Solution Approach 2:
The patent changes the thickness parameter of signal lines to resolve the contradiction. Specifically, the first signal line thickness is set to be greater than the gate electrode thickness, and the second signal line thickness is set to be greater than the source/drain electrode thickness, thereby reducing resistance and IR Drop effects in high-PPI displays.
2Reliability
If copper-based metal is used for signal lines to reduce resistance, then electrical conductivity is improved, but manufacturing process complexity increases
Solution Approach 1:
The patent specifies copper-based metal for signal lines with controlled thickness parameters, changing material and dimensional parameters to achieve low resistance while managing manufacturing complexity through precise process control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces the influence of IR Drop, enhancing signal transmission and image quality in high-PPI display devices by using thicker signal lines and optimizing the array substrate structure, thereby improving the overall performance of high-resolution displays.
Implementation Method 1
reducing or avoiding various adverse effects caused by a voltage drop due to a resistance on a wiring
Implementation Method 2
reduces the influence of IR Drop, enhancing signal transmission
Data Source
AI summary
An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate; a first signal line on the base substrate; a first buffer layer provided on the base substrate and covering the first signal line; a second signal line on a side of the first buffer layer facing away from the base substrate; a first insulating layer provided on the base substrate and covering the second signal line; and a thin film transistor on a side of the first insulating layer facing away from the base substrate, the thin film transistor including a gate electrode, a source electrode and a drain electrode. A thickness of the first signal line is greater than that of the gate electrode, and a thickness of the second signal line is greater than that of the source electrode or the drain electrode.