Array Substrate Signal Lines with Parallel Conductive Layers
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Solution Overview
Problem
As TFT-LCDs increase in size, signal delay issues become more significant due to high signal line resistance, which existing technologies have not adequately addressed.
Innovation Solution
The implementation of an array substrate with signal lines comprising multiple conductive layers in different layers, connected in parallel through vias, reduces resistance and minimizes signal delay by creating a simpler structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the size of TFT-LCD becomes larger, then the display area increases, but signal line resistance increases causing signal delay
Solution Approach 1:
The patent transitions from a single-plane signal line structure to a three-dimensional multi-layer structure. Signal lines are arranged in multiple conductive layers (first conductive layer, second conductive layer, third conductive layer) stacked vertically, connected by vias. This spatial redistribution reduces the effective path length and resistance while maintaining large display area coverage.
2Reliability
If more conductive layers are added to reduce resistance, then signal transmission improves, but device complexity increases
Solution Approach 1:
The signal line system is segmented into multiple functional conductive layers: first conductive layer for initial signal distribution, second conductive layer for continued distribution, and third conductive layer for final connection to pixel electrodes. Each layer is separated by insulation layers and connected through vias, dividing the complex routing function into manageable segments that reduce overall resistance without creating excessive complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces signal line resistance, enhancing signal transmission speed and eliminating or reducing signal delay in TFT-LCDs, while maintaining a straightforward manufacturing process.
Implementation Method 1
forming a first conductive layer and a first insulation layer through deposition on a base substrate
Implementation Method 2
forming a via, wherein the via are formed by etching the first insulation layer to form a via passing through the first insulation layer
Data Source
AI summary
An array substrate is disclosed. The array substrate comprises a base substrate (4) and signal lines on the base substrate (4). The signal lines comprises a plurality of conductive layers (11, 12) in different layers, and the plurality of conductive layers (11, 12) are provided with insulation layers (21) therebetween, and are connected in parallel through one or more vias (3). Embodiments of the present disclosure further disclose a method for manufacturing the array substrate.