Array Substrate Signal Line Stacking Reduces Capacitive Coupling
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Solution Overview
Problem
Conventional vehicle-mounted display products with integrated touch screens suffer from severe flicker and poor touch performance due to capacitive coupling between signal lines in the fan-out region, leading to visible touch electrode blocks and compromised display and touch functionality.
Innovation Solution
An array substrate design featuring signal line units with two first signal lines in the same layer and one second signal line in a different layer, where the second signal line overlaps with the orthographic projections of the first signal lines, reducing capacitive coupling and signal intensity differences, and an insulating layer with specific dielectric constants and thicknesses to minimize capacitive effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If signal lines are arranged in the fan-out region with conventional layouts, then the display and touch functions can be implemented, but severe capacitive coupling occurs between signal lines causing flicker and poor touch performance
Solution Approach 1:
The patent applies dimensional change by transitioning signal lines from a planar two-dimensional layout to a three-dimensional stacked configuration. Specifically, the first signal line is positioned in a first plane while the second signal line is positioned in a second plane at a different height, creating vertical separation. This spatial reconfiguration in the third dimension (height/depth) effectively reduces capacitive coupling between signal lines while maintaining the necessary electrical connections for display and touch functions.
Solution Approach 2:
The patent introduces an insulating layer as an intermediary substance between the first and second signal lines. This insulating layer, positioned between the two conductive signal lines at different heights, acts as a mediator that prevents direct electrical interaction and reduces capacitive coupling. The insulating material serves as a buffer that maintains electrical isolation while allowing the signal lines to be in close proximity for compact design.
2Area of stationary object
If signal lines are positioned close together to reduce area, then device size is reduced, but capacitive coupling increases causing visible touch electrode blocks
Solution Approach 1:
The patent resolves the area-coupling trade-off by utilizing the vertical dimension. Instead of increasing horizontal separation distance (which would increase area), the signal lines are separated in the vertical direction through stacking at different heights. This allows the signal lines to remain close in the horizontal plane (maintaining compact area) while being sufficiently isolated vertically to minimize capacitive coupling and prevent visible touch electrode blocks.
Solution Approach 2:
The patent employs asymmetric positioning where the first and second signal lines are not arranged symmetrically in the same plane, but rather asymmetrically in different planes/heights. This asymmetric three-dimensional arrangement optimizes the spatial relationship between signal lines, allowing compact horizontal spacing while maintaining vertical separation to reduce capacitive effects and signal interference.
3Reliability
If conventional signal line configurations are used, then manufacturing is simplified, but flicker and touch performance issues occur
Solution Approach 1:
The patent implements a multi-plane signal line configuration where signal lines are positioned at different heights (first plane and second plane). This three-dimensional arrangement improves display quality by reducing capacitive coupling and eliminating flicker, while the complexity is managed through systematic layering that can be integrated into existing manufacturing processes.
Solution Approach 2:
The patent applies a nested layering structure where signal lines at different heights are organized in hierarchical planes. The first signal line resides in one plane while the second signal line is nested in a different plane at a different height, creating a layered configuration. This nesting approach systematically manages the increased structural complexity by organizing signal lines in discrete, manufacturable layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces or eliminates flicker and signal intensity differences, enhancing display and touch performance while allowing for a narrow bezel, ensuring the touch electrode block is not visible and improving overall display quality.
Implementation Method 1
severe flicker and poor touch performance due to capacitive coupling between signal lines in the fan-out region
Implementation Method 2
an insulating layer with specific dielectric constants and thicknesses to minimize capacitive effects
Data Source
AI summary
The present disclosure provides an array substrate and a display panel. The array substrate includes a base substrate and at least one signal line unit in a fan-out region of the base substrate. Each of the at least one signal line unit includes two first signal lines and one second signal line, and the two first signal lines and the one second signal line are respectively in different layers and extend in a same direction. A center line of an orthographic projection of the one second signal line on the base substrate overlaps with a center line of an orthographic projection of an interval region between the two first signal lines.